diff options
| author | Hadar Hen Zion <hadarh@mellanox.com> | 2016-07-01 14:51:06 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-07-02 14:40:40 -0400 |
| commit | 398f33511e97aad7f259e864a1596fc8ef559dc1 (patch) | |
| tree | 93e2a0f2533767af4d8b6c7a611a46fdf6d990fd /drivers/net/ethernet/mellanox/mlx5/core/en.h | |
| parent | 724b2aa15126d9e24b36650c5cad9cf468c20785 (diff) | |
net/mlx5e: Mark enabled RQTs instances explicitly
In the current driver implementation two types of receive queue
tables (RQTs) are in use - direct and indirect.
Change the driver to mark each new created RQT (direct or indirect)
as "enabled". This behaviour is needed for introducing new mlx5e
instances which serve to represent SRIOV VFs.
The VF representors will have only one type of RQTs (direct).
An "enabled" flag is added to each RQT to allow better handling
and code sharing between the representors and the nic netdevices.
This patch doesn't add any new functionality.
Signed-off-by: Hadar Hen Zion <hadarh@mellanox.com>
Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 8dad50caa4c9..91c6bbeca656 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h @@ -552,10 +552,15 @@ struct mlx5e_flow_steering { struct mlx5e_arfs_tables arfs; }; -struct mlx5e_tir { - u32 tirn; +struct mlx5e_rqt { u32 rqtn; - struct list_head list; + bool enabled; +}; + +struct mlx5e_tir { + u32 tirn; + struct mlx5e_rqt rqt; + struct list_head list; }; enum { @@ -576,7 +581,7 @@ struct mlx5e_priv { struct mlx5e_channel **channel; u32 tisn[MLX5E_MAX_NUM_TC]; - u32 indir_rqtn; + struct mlx5e_rqt indir_rqt; struct mlx5e_tir indir_tir[MLX5E_NUM_INDIR_TIRS]; struct mlx5e_tir direct_tir[MLX5E_MAX_NUM_CHANNELS]; u32 tx_rates[MLX5E_MAX_NUM_SQS]; |