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authorDan Nowlin <dan.nowlin@intel.com>2020-05-15 17:51:20 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2020-05-31 03:39:45 -0700
commitc9a12d6d2091175fe2dc1707dd40d6ad781414fe (patch)
tree2bd22d55ada7d0cfcfbdf52055e418d41de01efa /drivers/net/ethernet/intel
parent2bb19d6e077190bafbfd50f3793333af3f07a7b1 (diff)
ice: Increase timeout after PFR
To allow for resets during package download, increase the timeout period after performing a PFR. The time waited is the global config lock timeout plus the normal PFSWR timeout. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/ice/ice_common.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
index 8c73e161829d..d4a31c734326 100644
--- a/drivers/net/ethernet/intel/ice/ice_common.c
+++ b/drivers/net/ethernet/intel/ice/ice_common.c
@@ -964,7 +964,12 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));
- for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
+ /* Wait for the PFR to complete. The wait time is the global config lock
+ * timeout plus the PFR timeout which will account for a possible reset
+ * that is occurring during a download package operation.
+ */
+ for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT +
+ ICE_PF_RESET_WAIT_COUNT; cnt++) {
reg = rd32(hw, PFGEN_CTRL);
if (!(reg & PFGEN_CTRL_PFSWR_M))
break;