diff options
| author | Yufeng Mo <moyufeng@huawei.com> | 2020-11-20 17:16:21 +0800 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2020-11-21 14:33:46 -0800 |
| commit | 3a6863e4e8ee212c7f86594299d9ff0d6a15ecbc (patch) | |
| tree | 198cc7690ddcfccbf5e58737d6521b5218387910 /drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | |
| parent | 30ae7f8a6aa730e6dab8d86ccbbacdcbec1c389f (diff) | |
net: hns3: add support for pf querying new interrupt resources
For HNAE3_DEVICE_VERSION_V3, a maximum of 1281 interrupt
resources are supported. To utilize these new resources,
extend the corresponding field or variable to 16bit type,
and remove the restriction of NIC client that only use a
maximum of 65 interrupt vectors. In addition, the I/O address
of the extended interrupt resources are different, so an extra
handler is needed.
Currently, the total number of interrupts is the sum of RoCE's
number and RoCE's offset (RoCE is in front of NIC), since
the number of both NIC and RoCE are same. For readability,
rewrite the corresponding field of the command, rename the
RoCE's offset field as the number of NIC interrupts, then
the total number of interrupts is sum of the number of RoCE
and NIC, and replace vport->back with hdev in
hclge_init_roce_base_info() for simplifying the code.
Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h')
| -rw-r--r-- | drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 3ed4e84f8b2e..bd17685e4065 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -27,9 +27,11 @@ (HCLGE_PF_CFG_BLOCK_SIZE / HCLGE_CFG_RD_LEN_BYTES) #define HCLGE_VECTOR_REG_BASE 0x20000 +#define HCLGE_VECTOR_EXT_REG_BASE 0x30000 #define HCLGE_MISC_VECTOR_REG_BASE 0x20400 #define HCLGE_VECTOR_REG_OFFSET 0x4 +#define HCLGE_VECTOR_REG_OFFSET_H 0x1000 #define HCLGE_VECTOR_VF_OFFSET 0x100000 #define HCLGE_CMDQ_TX_ADDR_L_REG 0x27000 @@ -768,7 +770,6 @@ struct hclge_dev { u16 num_msi; u16 num_msi_left; u16 num_msi_used; - u16 roce_base_msix_offset; u32 base_msi_vector; u16 *vector_status; int *vector_irq; |