diff options
author | Varun Prakash <varun@chelsio.com> | 2019-06-10 18:36:34 +0530 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2019-06-10 09:20:23 -0700 |
commit | a248384e6420ebda63f788d33fac1c0a081e57a8 (patch) | |
tree | a9c39190e749e184fcda98d85f54777bfee9a980 /drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c | |
parent | ba217a44f815ae06226461ab74a9df09b35e5a5f (diff) |
cxgb4/libcxgb/cxgb4i/cxgbit: enable eDRAM page pods for iSCSI
Page pods are used for direct data placement, this patch
enables eDRAM page pods if firmware supports this feature.
Signed-off-by: Varun Prakash <varun@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c')
-rw-r--r-- | drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c | 47 |
1 files changed, 39 insertions, 8 deletions
diff --git a/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c b/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c index e2919005ead3..21034536c9c5 100644 --- a/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c +++ b/drivers/net/ethernet/chelsio/libcxgb/libcxgb_ppm.c @@ -123,6 +123,9 @@ static int ppm_get_cpu_entries(struct cxgbi_ppm *ppm, unsigned int count, unsigned int cpu; int i; + if (!ppm->pool) + return -EINVAL; + cpu = get_cpu(); pool = per_cpu_ptr(ppm->pool, cpu); spin_lock_bh(&pool->lock); @@ -169,7 +172,9 @@ static int ppm_get_entries(struct cxgbi_ppm *ppm, unsigned int count, } ppm->next = i + count; - if (ppm->next >= ppm->bmap_index_max) + if (ppm->max_index_in_edram && (ppm->next >= ppm->max_index_in_edram)) + ppm->next = 0; + else if (ppm->next >= ppm->bmap_index_max) ppm->next = 0; spin_unlock_bh(&ppm->map_lock); @@ -382,18 +387,36 @@ static struct cxgbi_ppm_pool *ppm_alloc_cpu_pool(unsigned int *total, int cxgbi_ppm_init(void **ppm_pp, struct net_device *ndev, struct pci_dev *pdev, void *lldev, - struct cxgbi_tag_format *tformat, - unsigned int ppmax, - unsigned int llimit, - unsigned int start, - unsigned int reserve_factor) + struct cxgbi_tag_format *tformat, unsigned int iscsi_size, + unsigned int llimit, unsigned int start, + unsigned int reserve_factor, unsigned int iscsi_edram_start, + unsigned int iscsi_edram_size) { struct cxgbi_ppm *ppm = (struct cxgbi_ppm *)(*ppm_pp); struct cxgbi_ppm_pool *pool = NULL; - unsigned int ppmax_pool = 0; unsigned int pool_index_max = 0; - unsigned int alloc_sz; + unsigned int ppmax_pool = 0; unsigned int ppod_bmap_size; + unsigned int alloc_sz; + unsigned int ppmax; + + if (!iscsi_edram_start) + iscsi_edram_size = 0; + + if (iscsi_edram_size && + ((iscsi_edram_start + iscsi_edram_size) != start)) { + pr_err("iscsi ppod region not contiguous: EDRAM start 0x%x " + "size 0x%x DDR start 0x%x\n", + iscsi_edram_start, iscsi_edram_size, start); + return -EINVAL; + } + + if (iscsi_edram_size) { + reserve_factor = 0; + start = iscsi_edram_start; + } + + ppmax = (iscsi_edram_size + iscsi_size) >> PPOD_SIZE_SHIFT; if (ppm) { pr_info("ippm: %s, ppm 0x%p,0x%p already initialized, %u/%u.\n", @@ -434,6 +457,14 @@ int cxgbi_ppm_init(void **ppm_pp, struct net_device *ndev, __func__, ppmax, ppmax_pool, ppod_bmap_size, start, end); } + if (iscsi_edram_size) { + unsigned int first_ddr_idx = + iscsi_edram_size >> PPOD_SIZE_SHIFT; + + ppm->max_index_in_edram = first_ddr_idx - 1; + bitmap_set(ppm->ppod_bmap, first_ddr_idx, 1); + pr_debug("reserved %u ppod in bitmap\n", first_ddr_idx); + } spin_lock_init(&ppm->map_lock); kref_init(&ppm->refcnt); |