diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-24 12:07:37 +0200 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2006-05-24 23:45:24 +0100 |
commit | ace4dfee56fff184e07d7248a759b574321afa8b (patch) | |
tree | ee5f3b3d05cb081f073f6f9e9042ae457ba43b12 /drivers/mtd | |
parent | c7c16c8e7604a8974d48562fecf8d9c7e221fced (diff) |
[MTD] NAND coding style and namespace cleanup
Cleanup the functions which are not going to change in the
next steps.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd')
-rw-r--r-- | drivers/mtd/nand/nand_base.c | 1054 |
1 files changed, 520 insertions, 534 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 649c238837bb..6036d322bf68 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -10,63 +10,21 @@ * http://www.linux-mtd.infradead.org/tech/nand.html * * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) - * 2002 Thomas Gleixner (tglx@linutronix.de) + * 2002-2006 Thomas Gleixner (tglx@linutronix.de) * - * 02-08-2004 tglx: support for strange chips, which cannot auto increment - * pages on read / read_oob - * - * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes - * pointed this out, as he marked an auto increment capable chip - * as NOAUTOINCR in the board driver. - * Make reads over block boundaries work too - * - * 04-14-2004 tglx: first working version for 2k page size chips - * - * 05-19-2004 tglx: Basic support for Renesas AG-AND chips - * - * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared - * among multiple independend devices. Suggestions and initial - * patch from Ben Dooks <ben-mtd@fluff.org> - * - * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" - * issue. Basically, any block not rewritten may lose data when - * surrounding blocks are rewritten many times. JFFS2 ensures - * this doesn't happen for blocks it uses, but the Bad Block - * Table(s) may not be rewritten. To ensure they do not lose - * data, force them to be rewritten when some of the surrounding - * blocks are erased. Rather than tracking a specific nearby - * block (which could itself go bad), use a page address 'mask' to - * select several blocks in the same area, and rewrite the BBT - * when any of them are erased. - * - * 01-03-2005 dmarlin: added support for the device recovery command sequence - * for Renesas AG-AND chips. If there was a sudden loss of power - * during an erase operation, a "device recovery" operation must - * be performed when power is restored to ensure correct - * operation. - * - * 01-20-2005 dmarlin: added support for optional hardware specific callback - * routine to perform extra error status checks on erase and write - * failures. This required adding a wrapper function for - * nand_read_ecc. - * - * 08-20-2005 vwool: suspend/resume added - * - * Credits: + * Credits: * David Woodhouse for adding multichip support * * Aleph One Ltd. and Toby Churchill Ltd. for supporting the * rework for 2K page size chips * - * TODO: + * TODO: * Enable cached programming for 2k page size chips * Check, if mtd->ecctype should be set to MTD_ECC_HW * if we have HW ecc support. * The AG-AND chips have nice features for speed improvement, * which are not supported yet. Read / program 4 pages in one go. * - * $Id: nand_base.c,v 1.150 2005/09/15 13:58:48 vwool Exp $ - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. @@ -149,11 +107,11 @@ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr); static void nand_sync(struct mtd_info *mtd); /* Some internal functions */ -static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, +static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, int page, uint8_t * oob_buf, struct nand_oobinfo *oobsel, int mode); #ifdef CONFIG_MTD_NAND_VERIFY_WRITE -static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, +static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, int page, int numpages, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode); @@ -161,7 +119,7 @@ static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, #define nand_verify_pages(...) (0) #endif -static int nand_get_device(struct nand_chip *this, struct mtd_info *mtd, +static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state); /* @@ -178,17 +136,17 @@ DEFINE_LED_TRIGGER(nand_led_trigger); */ static void nand_release_device(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; /* De-select the NAND device */ - this->select_chip(mtd, -1); + chip->select_chip(mtd, -1); /* Release the controller and the chip */ - spin_lock(&this->controller->lock); - this->controller->active = NULL; - this->state = FL_READY; - wake_up(&this->controller->wq); - spin_unlock(&this->controller->lock); + spin_lock(&chip->controller->lock); + chip->controller->active = NULL; + chip->state = FL_READY; + wake_up(&chip->controller->wq); + spin_unlock(&chip->controller->lock); } /** @@ -199,8 +157,8 @@ static void nand_release_device(struct mtd_info *mtd) */ static uint8_t nand_read_byte(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; - return readb(this->IO_ADDR_R); + struct nand_chip *chip = mtd->priv; + return readb(chip->IO_ADDR_R); } /** @@ -212,8 +170,8 @@ static uint8_t nand_read_byte(struct mtd_info *mtd) */ static uint8_t nand_read_byte16(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; - return (uint8_t) cpu_to_le16(readw(this->IO_ADDR_R)); + struct nand_chip *chip = mtd->priv; + return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); } /** @@ -225,8 +183,8 @@ static uint8_t nand_read_byte16(struct mtd_info *mtd) */ static u16 nand_read_word(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; - return readw(this->IO_ADDR_R); + struct nand_chip *chip = mtd->priv; + return readw(chip->IO_ADDR_R); } /** @@ -236,15 +194,17 @@ static u16 nand_read_word(struct mtd_info *mtd) * * Default select function for 1 chip devices. */ -static void nand_select_chip(struct mtd_info *mtd, int chip) +static void nand_select_chip(struct mtd_info *mtd, int chipnr) { - struct nand_chip *this = mtd->priv; - switch (chip) { + struct nand_chip *chip = mtd->priv; + + switch (chipnr) { case -1: - this->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); break; case 0: - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, + NAND_NCE | NAND_CTRL_CHANGE); break; default: @@ -263,10 +223,10 @@ static void nand_select_chip(struct mtd_info *mtd, int chip) static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; for (i = 0; i < len; i++) - writeb(buf[i], this->IO_ADDR_W); + writeb(buf[i], chip->IO_ADDR_W); } /** @@ -280,10 +240,10 @@ static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; for (i = 0; i < len; i++) - buf[i] = readb(this->IO_ADDR_R); + buf[i] = readb(chip->IO_ADDR_R); } /** @@ -297,10 +257,10 @@ static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; for (i = 0; i < len; i++) - if (buf[i] != readb(this->IO_ADDR_R)) + if (buf[i] != readb(chip->IO_ADDR_R)) return -EFAULT; return 0; @@ -317,12 +277,12 @@ static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; u16 *p = (u16 *) buf; len >>= 1; for (i = 0; i < len; i++) - writew(p[i], this->IO_ADDR_W); + writew(p[i], chip->IO_ADDR_W); } @@ -337,12 +297,12 @@ static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; u16 *p = (u16 *) buf; len >>= 1; for (i = 0; i < len; i++) - p[i] = readw(this->IO_ADDR_R); + p[i] = readw(chip->IO_ADDR_R); } /** @@ -356,12 +316,12 @@ static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) { int i; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; u16 *p = (u16 *) buf; len >>= 1; for (i = 0; i < len; i++) - if (p[i] != readw(this->IO_ADDR_R)) + if (p[i] != readw(chip->IO_ADDR_R)) return -EFAULT; return 0; @@ -378,40 +338,37 @@ static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) { int page, chipnr, res = 0; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; u16 bad; if (getchip) { - page = (int)(ofs >> this->page_shift); - chipnr = (int)(ofs >> this->chip_shift); + page = (int)(ofs >> chip->page_shift); + chipnr = (int)(ofs >> chip->chip_shift); - /* Grab the lock and see if the device is available */ - nand_get_device(this, mtd, FL_READING); + nand_get_device(chip, mtd, FL_READING); /* Select the NAND device */ - this->select_chip(mtd, chipnr); + chip->select_chip(mtd, chipnr); } else page = (int)ofs; - if (this->options & NAND_BUSWIDTH_16) { - this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, - page & this->pagemask); - bad = cpu_to_le16(this->read_word(mtd)); - if (this->badblockpos & 0x1) + if (chip->options & NAND_BUSWIDTH_16) { + chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, + page & chip->pagemask); + bad = cpu_to_le16(chip->read_word(mtd)); + if (chip->badblockpos & 0x1) bad >>= 8; if ((bad & 0xFF) != 0xff) res = 1; } else { - this->cmdfunc(mtd, NAND_CMD_READOOB, this->badblockpos, - page & this->pagemask); - if (this->read_byte(mtd) != 0xff) + chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, + page & chip->pagemask); + if (chip->read_byte(mtd) != 0xff) res = 1; } - if (getchip) { - /* Deselect and wake up anyone waiting on the device */ + if (getchip) nand_release_device(mtd); - } return res; } @@ -426,22 +383,22 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) */ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) { - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; uint8_t buf[2] = { 0, 0 }; size_t retlen; int block; /* Get block number */ - block = ((int)ofs) >> this->bbt_erase_shift; - if (this->bbt) - this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); + block = ((int)ofs) >> chip->bbt_erase_shift; + if (chip->bbt) + chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); /* Do we have a flash based bad block table ? */ - if (this->options & NAND_USE_FLASH_BBT) + if (chip->options & NAND_USE_FLASH_BBT) return nand_update_bbt(mtd, ofs); /* We write two bytes, so we dont have to mess with 16 bit access */ - ofs += mtd->oobsize + (this->badblockpos & ~0x01); + ofs += mtd->oobsize + (chip->badblockpos & ~0x01); return nand_write_oob(mtd, ofs, 2, &retlen, buf); } @@ -454,10 +411,10 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) */ static int nand_check_wp(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; /* Check the WP bit */ - this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); - return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; + chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; } /** @@ -473,10 +430,10 @@ static int nand_check_wp(struct mtd_info *mtd) static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) { - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; - if (!this->bbt) - return this->block_bad(mtd, ofs, getchip); + if (!chip->bbt) + return chip->block_bad(mtd, ofs, getchip); /* Return info from the table */ return nand_isbad_bbt(mtd, ofs, allowbbt); @@ -488,13 +445,13 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, */ static void nand_wait_ready(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; unsigned long timeo = jiffies + 2; led_trigger_event(nand_led_trigger, LED_FULL); /* wait until command is processed or timeout occures */ do { - if (this->dev_ready(mtd)) + if (chip->dev_ready(mtd)) break; touch_softlockup_watchdog(); } while (time_before(jiffies, timeo)); @@ -514,7 +471,7 @@ static void nand_wait_ready(struct mtd_info *mtd) static void nand_command(struct mtd_info *mtd, unsigned int command, int column, int page_addr) { - register struct nand_chip *this = mtd->priv; + register struct nand_chip *chip = mtd->priv; int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; /* @@ -534,10 +491,10 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, column -= 256; readcmd = NAND_CMD_READ1; } - this->cmd_ctrl(mtd, readcmd, ctrl); + chip->cmd_ctrl(mtd, readcmd, ctrl); ctrl &= ~NAND_CTRL_CHANGE; } - this->cmd_ctrl(mtd, command, ctrl); + chip->cmd_ctrl(mtd, command, ctrl); /* * Address cycle, when necessary @@ -546,20 +503,20 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, /* Serially input address */ if (column != -1) { /* Adjust columns for 16 bit buswidth */ - if (this->options & NAND_BUSWIDTH_16) + if (chip->options & NAND_BUSWIDTH_16) column >>= 1; - this->cmd_ctrl(mtd, column, ctrl); + chip->cmd_ctrl(mtd, column, ctrl); ctrl &= ~NAND_CTRL_CHANGE; } if (page_addr != -1) { - this->cmd_ctrl(mtd, page_addr, ctrl); + chip->cmd_ctrl(mtd, page_addr, ctrl); ctrl &= ~NAND_CTRL_CHANGE; - this->cmd_ctrl(mtd, page_addr >> 8, ctrl); + chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); /* One more address cycle for devices > 32MiB */ - if (this->chipsize > (32 << 20)) - this->cmd_ctrl(mtd, page_addr >> 16, ctrl); + if (chip->chipsize > (32 << 20)) + chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); } - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * program and erase have their own busy handlers @@ -572,17 +529,17 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); return; case NAND_CMD_RESET: - if (this->dev_ready) + if (chip->dev_ready) break; - udelay(this->chip_delay); - this->cmd_ctrl(mtd, NAND_CMD_STATUS, + udelay(chip->chip_delay); + chip->cmd_ctrl(mtd, NAND_CMD_STATUS, NAND_CTRL_CLE | NAND_CTRL_CHANGE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); - while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); + while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; return; /* This applies to read commands */ @@ -591,8 +548,8 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, * If we don't have access to the busy pin, we apply the given * command delay */ - if (!this->dev_ready) { - udelay(this->chip_delay); + if (!chip->dev_ready) { + udelay(chip->chip_delay); return; } } @@ -618,7 +575,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, static void nand_command_lp(struct mtd_info *mtd, unsigned int command, int column, int page_addr) { - register struct nand_chip *this = mtd->priv; + register struct nand_chip *chip = mtd->priv; /* Emulate NAND_CMD_READOOB */ if (command == NAND_CMD_READOOB) { @@ -627,7 +584,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, } /* Command latch cycle */ - this->cmd_ctrl(mtd, command & 0xff, + chip->cmd_ctrl(mtd, command & 0xff, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); if (column != -1 || page_addr != -1) { @@ -636,23 +593,23 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, /* Serially input address */ if (column != -1) { /* Adjust columns for 16 bit buswidth */ - if (this->options & NAND_BUSWIDTH_16) + if (chip->options & NAND_BUSWIDTH_16) column >>= 1; - this->cmd_ctrl(mtd, column, ctrl); + chip->cmd_ctrl(mtd, column, ctrl); ctrl &= ~NAND_CTRL_CHANGE; - this->cmd_ctrl(mtd, column >> 8, ctrl); + chip->cmd_ctrl(mtd, column >> 8, ctrl); } if (page_addr != -1) { - this->cmd_ctrl(mtd, page_addr, ctrl); - this->cmd_ctrl(mtd, page_addr >> 8, + chip->cmd_ctrl(mtd, page_addr, ctrl); + chip->cmd_ctrl(mtd, page_addr >> 8, NAND_NCE | NAND_ALE); /* One more address cycle for devices > 128MiB */ - if (this->chipsize > (128 << 20)) - this->cmd_ctrl(mtd, page_addr >> 16, + if (chip->chipsize > (128 << 20)) + chip->cmd_ctrl(mtd, page_addr >> 16, NAND_NCE | NAND_ALE); } } - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); /* * program and erase have their own busy handlers @@ -677,21 +634,21 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_STATUS_ERROR1: case NAND_CMD_STATUS_ERROR2: case NAND_CMD_STATUS_ERROR3: - udelay(this->chip_delay); + udelay(chip->chip_delay); return; case NAND_CMD_RESET: - if (this->dev_ready) + if (chip->dev_ready) break; - udelay(this->chip_delay); - this->cmd_ctrl(mtd, NAND_CMD_STATUS, NAND_NCE | NAND_CLE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); - while (!(this->read_byte(mtd) & NAND_STATUS_READY)) ; + udelay(chip->chip_delay); + chip->cmd_ctrl(mtd, NAND_CMD_STATUS, NAND_NCE | NAND_CLE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); + while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; return; case NAND_CMD_READ0: - this->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_NCE | NAND_CLE); - this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); + chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_NCE | NAND_CLE); + chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); /* This applies to read commands */ default: @@ -699,8 +656,8 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, * If we don't have access to the busy pin, we apply the given * command delay */ - if (!this->dev_ready) { - udelay(this->chip_delay); + if (!chip->dev_ready) { + udelay(chip->chip_delay); return; } } @@ -721,27 +678,27 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, * Get the device and lock it for exclusive access */ static int -nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state) +nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) { - spinlock_t *lock = &this->controller->lock; - wait_queue_head_t *wq = &this->controller->wq; + spinlock_t *lock = &chip->controller->lock; + wait_queue_head_t *wq = &chip->controller->wq; DECLARE_WAITQUEUE(wait, current); retry: spin_lock(lock); /* Hardware controller shared among independend devices */ /* Hardware controller shared among independend devices */ - if (!this->controller->active) - this->controller->active = this; + if (!chip->controller->active) + chip->controller->active = chip; - if (this->controller->active == this && this->state == FL_READY) { - this->state = new_state; + if (chip->controller->active == chip && chip->state == FL_READY) { + chip->state = new_state; spin_unlock(lock); return 0; } if (new_state == FL_PM_SUSPENDED) { spin_unlock(lock); - return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; + return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; } set_current_state(TASK_UNINTERRUPTIBLE); add_wait_queue(wq, &wait); @@ -762,7 +719,7 @@ nand_get_device(struct nand_chip *this, struct mtd_info *mtd, int new_state) * general NAND and SmartMedia specs * */ -static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) +static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state) { unsigned long timeo = jiffies; @@ -779,28 +736,28 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) * any case on any machine. */ ndelay(100); - if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) - this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); + if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) + chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); else - this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); while (time_before(jiffies, timeo)) { /* Check, if we were interrupted */ - if (this->state != state) + if (chip->state != state) return 0; - if (this->dev_ready) { - if (this->dev_ready(mtd)) + if (chip->dev_ready) { + if (chip->dev_ready(mtd)) break; } else { - if (this->read_byte(mtd) & NAND_STATUS_READY) + if (chip->read_byte(mtd) & NAND_STATUS_READY) break; } cond_resched(); } led_trigger_event(nand_led_trigger, LED_OFF); - status = (int)this->read_byte(mtd); + status = (int)chip->read_byte(mtd); return status; } @@ -808,7 +765,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) * nand_write_page - [GENERIC] write one page * @mtd: MTD device structure * @this: NAND chip structure - * @page: startpage inside the chip, must be called with (page & this->pagemask) + * @page: startpage inside the chip, must be called with (page & chip->pagemask) * @oob_buf: out of band data buffer * @oobsel: out of band selecttion structre * @cached: 1 = enable cached programming if supported by chip @@ -819,75 +776,75 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state) * * Cached programming is not supported yet. */ -static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int page, +static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, int page, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int cached) { int i, status; uint8_t ecc_code[32]; - int eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE; + int eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE; int *oob_config = oobsel->eccpos; - int datidx = 0, eccidx = 0, eccsteps = this->ecc.steps; + int datidx = 0, eccidx = 0, eccsteps = chip->ecc.steps; int eccbytes = 0; /* FIXME: Enable cached programming */ cached = 0; /* Send command to begin auto page programming */ - this->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); + chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); /* Write out complete page of data, take care of eccmode */ switch (eccmode) { /* No ecc, write all */ case NAND_ECC_NONE: printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n"); - this->write_buf(mtd, this->data_poi, mtd->writesize); + chip->write_buf(mtd, chip->data_poi, mtd->writesize); break; /* Software ecc 3/256, write all */ case NAND_ECC_SOFT: for (; eccsteps; eccsteps--) { - this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code); + chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code); for (i = 0; i < 3; i++, eccidx++) oob_buf[oob_config[eccidx]] = ecc_code[i]; - datidx += this->ecc.size; + datidx += chip->ecc.size; } - this->write_buf(mtd, this->data_poi, mtd->writesize); + chip->write_buf(mtd, chip->data_poi, mtd->writesize); break; default: - eccbytes = this->ecc.bytes; + eccbytes = chip->ecc.bytes; for (; eccsteps; eccsteps--) { /* enable hardware ecc logic for write */ - this->ecc.hwctl(mtd, NAND_ECC_WRITE); - this->write_buf(mtd, &this->data_poi[datidx], this->ecc.size); - this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code); + chip->ecc.hwctl(mtd, NAND_ECC_WRITE); + chip->write_buf(mtd, &chip->data_poi[datidx], chip->ecc.size); + chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code); for (i = 0; i < eccbytes; i++, eccidx++) oob_buf[oob_config[eccidx]] = ecc_code[i]; /* If the hardware ecc provides syndromes then * the ecc code must be written immidiately after * the data bytes (words) */ - if (this->options & NAND_HWECC_SYNDROME) - this->write_buf(mtd, ecc_code, eccbytes); - datidx += this->ecc.size; + if (chip->options & NAND_HWECC_SYNDROME) + chip->write_buf(mtd, ecc_code, eccbytes); + datidx += chip->ecc.size; } break; } /* Write out OOB data */ - if (this->options & NAND_HWECC_SYNDROME) - this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes); + if (chip->options & NAND_HWECC_SYNDROME) + chip->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes); else - this->write_buf(mtd, oob_buf, mtd->oobsize); + chip->write_buf(mtd, oob_buf, mtd->oobsize); /* Send command to actually program the data */ - this->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); + chip->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1); if (!cached) { /* call wait ready function */ - status = this->waitfunc(mtd, this, FL_WRITING); + status = chip->waitfunc(mtd, chip, FL_WRITING); /* See if operation failed and additional status checks are available */ - if ((status & NAND_STATUS_FAIL) && (this->errstat)) { - status = this->errstat(mtd, this, FL_WRITING, status, page); + if ((status & NAND_STATUS_FAIL) && (chip->errstat)) { + status = chip->errstat(mtd, chip, FL_WRITING, status, page); } /* See if device thinks it succeeded */ @@ -898,7 +855,7 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag } else { /* FIXME: Implement cached programming ! */ /* wait until cache is ready */ - // status = this->waitfunc (mtd, this, FL_CACHEDRPG); + // status = chip->waitfunc (mtd, this, FL_CACHEDRPG); } return 0; } @@ -908,7 +865,7 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag * nand_verify_pages - [GENERIC] verify the chip contents after a write * @mtd: MTD device structure * @this: NAND chip structure - * @page: startpage inside the chip, must be called with (page & this->pagemask) + * @page: startpage inside the chip, must be called with (page & chip->pagemask) * @numpages: number of pages to verify * @oob_buf: out of band data buffer * @oobsel: out of band selecttion structre @@ -923,23 +880,23 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag * the error later when the ECC page check fails, but we would rather catch * it early in the page write stage. Better to write no data than invalid data. */ -static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int page, int numpages, +static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, int page, int numpages, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode) { int i, j, datidx = 0, oobofs = 0, res = -EIO; - int eccsteps = this->eccsteps; + int eccsteps = chip->eccsteps; int hweccbytes; uint8_t oobdata[64]; - hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; + hweccbytes = (chip->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0; /* Send command to read back the first page */ - this->cmdfunc(mtd, NAND_CMD_READ0, 0, page); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); for (;;) { for (j = 0; j < eccsteps; j++) { /* Loop through and verify the data */ - if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) { + if (chip->verify_buf(mtd, &chip->data_poi[datidx], mtd->eccsize)) { DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); goto out; } @@ -947,7 +904,7 @@ static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int p /* Have we a hw generator layout ? */ if (!hweccbytes) continue; - if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) { + if (chip->verify_buf(mtd, &chip->oob_buf[oobofs], hweccbytes)) { DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); goto out; } @@ -958,13 +915,13 @@ static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int p * compare the ecc bytes */ if (oobmode) { - if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { + if (chip->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) { DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page); goto out; } } else { /* Read always, else autoincrement fails */ - this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps); + chip->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps); if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) { int ecccnt = oobsel->eccbytes; @@ -990,8 +947,8 @@ static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int p * Do this also before returning, so the chip is * ready for the next command. */ - if (!this->dev_ready) - udelay(this->chip_delay); + if (!chip->dev_ready) + udelay(chip->chip_delay); else nand_wait_ready(mtd); @@ -1001,14 +958,14 @@ static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *this, int p /* Check, if the chip supports auto page increment */ if (!NAND_CANAUTOINCR(this)) - this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); } /* * Terminate the read command. We come here in case of an error * So we must issue a reset command. */ out: - this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); + chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); return res; } #endif @@ -1051,13 +1008,13 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1; int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; - struct nand_chip *this = mtd->priv; + struct nand_chip *chip = mtd->priv; uint8_t *data_poi, *oob_data = oob_buf; uint8_t ecc_calc[32]; uint8_t ecc_code[32]; int eccmode, eccsteps; int *oob_config, datidx; - int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1; + int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; int eccbytes; int compareecc = 1; int oobreadlen; @@ -1073,35 +1030,35 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, /* Grab the lock and see if the device is available */ if (flags & NAND_GET_DEVICE) - nand_get_device(this, mtd, FL_READING); + nand_get_device(chip, mtd, FL_READING); /* Autoplace of oob data ? Use the default placement scheme */ if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) - oobsel = this->autooob; + oobsel = chip->autooob; - eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE; + eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE; oob_config = oobsel->eccpos; /* Select the NAND device */ - chipnr = (int)(from >> this->chip_shift); - this->select_chip(mtd, chipnr); + chipnr = (int)(from >> chip->chip_shift); + chip->select_chip(mtd, chipnr); /* First we calculate the starting page */ - realpage = (int)(from >> this->page_shift); - page = realpage & this->pagemask; + realpage = (int)(from >> chip->page_shift); + page = realpage & chip->pagemask; /* Get raw starting column */ col = from & (mtd->writesize - 1); end = mtd->writesize; - ecc = this->ecc.size; - eccbytes = this->ecc.bytes; + ecc = chip->ecc.size; + eccbytes = chip->ecc.bytes; - if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME)) + if ((eccmode == NAND_ECC_NONE) || (chip->options & NAND_HWECC_SYNDROME)) compareecc = 0; oobreadlen = mtd->oobsize; - if (this->options & NAND_HWECC_SYNDROME) + if (chip->options & NAND_HWECC_SYNDROME) oobreadlen -= oobsel->eccbytes; /* Loop until all data read */ @@ -1115,32 +1072,32 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, if (aligned) data_poi = &buf[read]; else - data_poi = this->data_buf; + data_poi = chip->data_buf; /* Check, if we have this page in the buffer * * FIXME: Make it work when we must provide oob data too, * check the usage of data_buf oob field */ - if (realpage == this->pagebuf && !oob_buf) { + if (realpage == chip->pagebuf && !oob_buf) { /* aligned read ? */ if (aligned) - memcpy(data_poi, this->data_buf, end); + memcpy(data_poi, chip->data_buf, end); goto readdata; } /* Check, if we must send the read command */ if (sndcmd) { - this->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); sndcmd = 0; } /* get oob area, if we have no oob buffer from fs-driver */ if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE || oobsel->useecc == MTD_NANDECC_AUTOPL_USR) - oob_data = &this->data_buf[end]; + oob_data = &chip->data_buf[end]; - eccsteps = this->ecc.steps; + eccsteps = chip->ecc.steps; switch (eccmode) { case NAND_ECC_NONE:{ @@ -1151,46 +1108,46 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, "Reading data from NAND FLASH without ECC is not recommended\n"); lastwhinge = jiffies; } - this->read_buf(mtd, data_poi, end); + chip->read_buf(mtd, data_poi, end); break; } case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */ - this->read_buf(mtd, data_poi, end); + chip->read_buf(mtd, data_poi, end); for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc) - this->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); + chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]); break; default: for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) { - this->ecc.hwctl(mtd, NAND_ECC_READ); - this->read_buf(mtd, &data_poi[datidx], ecc); + chip->ecc.hwctl(mtd, NAND_ECC_READ); + chip->read_buf(mtd, &data_poi[datidx], ecc); /* HW ecc with syndrome calculation must read the * syndrome from flash immidiately after the data */ if (!compareecc) { /* Some hw ecc generators need to know when the * syndrome is read from flash */ - this->ecc.hwctl(mtd, NAND_ECC_READSYN); - this->read_buf(mtd, &oob_data[i], eccbytes); + chip->ecc.hwctl(mtd, NAND_ECC_READSYN); + chip->read_buf(mtd, &oob_data[i], eccbytes); |