diff options
author | Richard Weinberger <richard@nod.at> | 2019-05-05 11:54:11 +0200 |
---|---|---|
committer | Richard Weinberger <richard@nod.at> | 2019-05-05 11:54:11 +0200 |
commit | 1c7cbd634763a0f0727d425c38486f0a3a9339a7 (patch) | |
tree | 6fb09b8fcae59059c36f36437c8fd18cf0db983d /drivers/mtd | |
parent | 37624b58542fb9f2d9a70e6ea006ef8a5f66c30b (diff) | |
parent | 1c14fe2167ef4294b41949bcc372ea39c0510c00 (diff) |
Merge tag 'nand/for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next
NAND core changes:
- Support having the bad block markers in either the first, second or
last page of a block. The combination of all three location is now
possible.
- Constification of NAND_OP_PARSER(_PATTERN) elements.
- Generic NAND DT bindings changed to yaml format (can be used to
check the proposed bindings. First platform to be fully supported:
sunxi.
- Stopped using several legacy hooks.
- Preparation to use the generic NAND layer with the addition of
several helpers and the removal of the struct nand_chip from generic
functions.
- Kconfig cleanup to prepare the introduction of external ECC engines
support.
- Fallthrough comments.
- Introduction of the SPI-mem dirmap API for SPI-NAND devices.
Raw NAND controller drivers changes:
- nandsim:
* Switch to ->exec-op().
- meson:
* Misc cleanups and fixes.
* New OOB layout.
- Sunxi:
* A23/A33 NAND DMA support.
- Ingenic:
* Full reorganization and cleanup.
* Clear separation between NAND controller and ECC engine.
* Support JZ4740 an JZ4725B.
- Denali:
* Clear controller/chip separation.
* ->exec_op() migration.
* Various cleanups.
- fsl_elbc:
* Enable software ECC support.
- Atmel:
* Sam9x60 support.
- GPMI:
* Introduce the GPMI_IS_MXS() macro.
- Various trivial/spelling/coding style fixes.
Diffstat (limited to 'drivers/mtd')
67 files changed, 3392 insertions, 2093 deletions
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 79a8ff542883..aa5a27fdfdd1 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -230,12 +230,11 @@ config SSFDC This enables read only access to SmartMedia formatted NAND flash. You can mount it with FAT file system. - config SM_FTL tristate "SmartMedia/xD new translation layer" depends on BLOCK select MTD_BLKDEVS - select MTD_NAND_ECC + select MTD_NAND_ECC_SW_HAMMING help This enables EXPERIMENTAL R/W support for SmartMedia/xD FTL (Flash translation layer). diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig index aa983422aa97..f9258d666846 100644 --- a/drivers/mtd/devices/Kconfig +++ b/drivers/mtd/devices/Kconfig @@ -207,7 +207,7 @@ comment "Disk-On-Chip Device Drivers" config MTD_DOCG3 tristate "M-Systems Disk-On-Chip G3" select BCH - select BCH_CONST_PARAMS if !MTD_NAND_BCH + select BCH_CONST_PARAMS if !MTD_NAND_ECC_SW_BCH select BITREVERSE help This provides an MTD device driver for the M-Systems DiskOnChip diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 9033215e62ea..495751ed3fd7 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -2,6 +2,5 @@ config MTD_NAND_CORE tristate source "drivers/mtd/nand/onenand/Kconfig" - source "drivers/mtd/nand/raw/Kconfig" source "drivers/mtd/nand/spi/Kconfig" diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c index 9c9f8936b63b..b6de955ac8bf 100644 --- a/drivers/mtd/nand/core.c +++ b/drivers/mtd/nand/core.c @@ -174,6 +174,40 @@ int nanddev_mtd_erase(struct mtd_info *mtd, struct erase_info *einfo) EXPORT_SYMBOL_GPL(nanddev_mtd_erase); /** + * nanddev_mtd_max_bad_blocks() - Get the maximum number of bad eraseblock on + * a specific region of the NAND device + * @mtd: MTD device + * @offs: offset of the NAND region + * @len: length of the NAND region + * + * Default implementation for mtd->_max_bad_blocks(). Only works if + * nand->memorg.max_bad_eraseblocks_per_lun is > 0. + * + * Return: a positive number encoding the maximum number of eraseblocks on a + * portion of memory, a negative error code otherwise. + */ +int nanddev_mtd_max_bad_blocks(struct mtd_info *mtd, loff_t offs, size_t len) +{ + struct nand_device *nand = mtd_to_nanddev(mtd); + struct nand_pos pos, end; + unsigned int max_bb = 0; + + if (!nand->memorg.max_bad_eraseblocks_per_lun) + return -ENOTSUPP; + + nanddev_offs_to_pos(nand, offs, &pos); + nanddev_offs_to_pos(nand, offs + len, &end); + + for (nanddev_offs_to_pos(nand, offs, &pos); + nanddev_pos_cmp(&pos, &end) < 0; + nanddev_pos_next_lun(nand, &pos)) + max_bb += nand->memorg.max_bad_eraseblocks_per_lun; + + return max_bb; +} +EXPORT_SYMBOL_GPL(nanddev_mtd_max_bad_blocks); + +/** * nanddev_init() - Initialize a NAND device * @nand: NAND device * @ops: NAND device operations diff --git a/drivers/mtd/nand/onenand/onenand_base.c b/drivers/mtd/nand/onenand/onenand_base.c index 4ca4b194e7d7..f41d76248550 100644 --- a/drivers/mtd/nand/onenand/onenand_base.c +++ b/drivers/mtd/nand/onenand/onenand_base.c @@ -2458,7 +2458,7 @@ static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); /* We write two bytes, so we don't have to mess with 16-bit access */ - ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); + ofs += mtd->oobsize + (this->badblockpos & ~0x01); /* FIXME : What to do when marking SLC block in partition * with MLC erasesize? For now, it is not advisable to * create partitions containing both SLC and MLC regions. @@ -3967,6 +3967,9 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) if (!(this->options & ONENAND_SKIP_INITIAL_UNLOCKING)) this->unlock_all(mtd); + /* Set the bad block marker position */ + this->badblockpos = ONENAND_BADBLOCK_POS; + ret = this->scan_bbt(mtd); if ((!FLEXONENAND(this)) || ret) return ret; diff --git a/drivers/mtd/nand/onenand/onenand_bbt.c b/drivers/mtd/nand/onenand/onenand_bbt.c index dde20487937d..57c31c81be18 100644 --- a/drivers/mtd/nand/onenand/onenand_bbt.c +++ b/drivers/mtd/nand/onenand/onenand_bbt.c @@ -190,9 +190,6 @@ static int onenand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) if (!bbm->bbt) return -ENOMEM; - /* Set the bad block position */ - bbm->badblockpos = ONENAND_BADBLOCK_POS; - /* Set erase shift */ bbm->bbt_erase_shift = this->erase_shift; diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index e604625e2dfa..0500c42f31cb 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -1,34 +1,29 @@ -config MTD_NAND_ECC +config MTD_NAND_ECC_SW_HAMMING tristate -config MTD_NAND_ECC_SMC +config MTD_NAND_ECC_SW_HAMMING_SMC bool "NAND ECC Smart Media byte order" - depends on MTD_NAND_ECC + depends on MTD_NAND_ECC_SW_HAMMING default n help Software ECC according to the Smart Media Specification. The original Linux implementation had byte 0 and 1 swapped. - -menuconfig MTD_NAND +menuconfig MTD_RAW_NAND tristate "Raw/Parallel NAND Device Support" depends on MTD - select MTD_NAND_ECC + select MTD_NAND_CORE + select MTD_NAND_ECC_SW_HAMMING help This enables support for accessing all type of raw/parallel NAND flash devices. For further information see <http://www.linux-mtd.infradead.org/doc/nand.html>. -if MTD_NAND +if MTD_RAW_NAND -config MTD_NAND_BCH - tristate - select BCH - depends on MTD_NAND_ECC_BCH - default MTD_NAND - -config MTD_NAND_ECC_BCH +config MTD_NAND_ECC_SW_BCH bool "Support software BCH ECC" + select BCH default n help This enables support for software BCH error correction. Binary BCH @@ -36,15 +31,13 @@ config MTD_NAND_ECC_BCH ECC codes. They are used with NAND devices requiring more than 1 bit of error correction. -config MTD_SM_COMMON - tristate - default n +comment "Raw/parallel NAND flash controllers" config MTD_NAND_DENALI tristate config MTD_NAND_DENALI_PCI - tristate "Support Denali NAND controller on Intel Moorestown" + tristate "Denali NAND controller on Intel Moorestown" select MTD_NAND_DENALI depends on PCI help @@ -52,31 +45,22 @@ config MTD_NAND_DENALI_PCI Denali NAND controller core. config MTD_NAND_DENALI_DT - tristate "Support Denali NAND controller as a DT device" + tristate "Denali NAND controller as a DT device" select MTD_NAND_DENALI depends on HAS_DMA && HAVE_CLK && OF help Enable the driver for NAND flash on platforms using a Denali NAND controller as a DT device. -config MTD_NAND_GPIO - tristate "GPIO assisted NAND Flash driver" - depends on GPIOLIB || COMPILE_TEST - depends on HAS_IOMEM - help - This enables a NAND flash driver where control signals are - connected to GPIO pins, and commands and data are communicated - via a memory mapped interface. - config MTD_NAND_AMS_DELTA - tristate "NAND Flash device on Amstrad E3" + tristate "Amstrad E3 NAND controller" depends on MACH_AMS_DELTA || COMPILE_TEST default y help Support for NAND flash on Amstrad E3 (Delta). config MTD_NAND_OMAP2 - tristate "NAND Flash device on OMAP2, OMAP3, OMAP4 and Keystone" + tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST depends on HAS_IOMEM help @@ -98,18 +82,6 @@ config MTD_NAND_OMAP_BCH config MTD_NAND_OMAP_BCH_BUILD def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH -config MTD_NAND_RICOH - tristate "Ricoh xD card reader" - default n - depends on PCI - select MTD_SM_COMMON - help - Enable support for Ricoh R5C852 xD card reader - You also need to enable ether - NAND SSFDC (SmartMedia) read only translation layer' or new - expermental, readwrite - 'SmartMedia/xD new translation layer' - config MTD_NAND_AU1550 tristate "Au1550/1200 NAND support" depends on MIPS_ALCHEMY @@ -117,8 +89,15 @@ config MTD_NAND_AU1550 This enables the driver for the NAND flash controller on the AMD/Alchemy 1550 SOC. +config MTD_NAND_NDFC + tristate "IBM/MCC 4xx NAND controller" + depends on 4xx + select MTD_NAND_ECC_SW_HAMMING_SMC + help + NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs + config MTD_NAND_S3C2410 - tristate "NAND Flash support for Samsung S3C SoCs" + tristate "Samsung S3C NAND controller" depends on ARCH_S3C24XX || ARCH_S3C64XX help This enables the NAND flash controller on the S3C24xx and S3C64xx @@ -128,18 +107,11 @@ config MTD_NAND_S3C2410 must advertise a platform_device for the driver to attach. config MTD_NAND_S3C2410_DEBUG - bool "Samsung S3C NAND driver debug" + bool "Samsung S3C NAND controller debug" depends on MTD_NAND_S3C2410 help Enable debugging of the S3C NAND driver -config MTD_NAND_NDFC - tristate "NDFC NanD Flash Controller" - depends on 4xx - select MTD_NAND_ECC_SMC - help - NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs - config MTD_NAND_S3C2410_CLKSTOP bool "Samsung S3C NAND IDLE clock stop" depends on MTD_NAND_S3C2410 @@ -151,89 +123,19 @@ config MTD_NAND_S3C2410_CLKSTOP approximately 5mA of power when there is nothing happening. config MTD_NAND_TANGO - tristate "NAND Flash support for Tango chips" + tristate "Tango NAND controller" depends on ARCH_TANGO || COMPILE_TEST depends on HAS_IOMEM help Enables the NAND Flash controller on Tango chips. -config MTD_NAND_DISKONCHIP - tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" - depends on HAS_IOMEM - select REED_SOLOMON - select REED_SOLOMON_DEC16 - help - This is a reimplementation of M-Systems DiskOnChip 2000, - Millennium and Millennium Plus as a standard NAND device driver, - as opposed to the earlier self-contained MTD device drivers. - This should enable, among other things, proper JFFS2 operation on - these devices. - -config MTD_NAND_DISKONCHIP_PROBE_ADVANCED - bool "Advanced detection options for DiskOnChip" - depends on MTD_NAND_DISKONCHIP - help - This option allows you to specify nonstandard address at which to - probe for a DiskOnChip, or to change the detection options. You - are unlikely to need any of this unless you are using LinuxBIOS. - Say 'N'. - -config MTD_NAND_DISKONCHIP_PROBE_ADDRESS - hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED - depends on MTD_NAND_DISKONCHIP - default "0" - help - By default, the probe for DiskOnChip devices will look for a - DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. - This option allows you to specify a single address at which to probe - for the device, which is useful if you have other devices in that - range which get upset when they are probed. - - (Note that on PowerPC, the normal probe will only check at - 0xE4000000.) - - Normally, you should leave this set to zero, to allow the probe at - the normal addresses. - -config MTD_NAND_DISKONCHIP_PROBE_HIGH - bool "Probe high addresses" - depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED - help - By default, the probe for DiskOnChip devices will look for a - DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. - This option changes to make it probe between 0xFFFC8000 and - 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be - useful to you. Say 'N'. - -config MTD_NAND_DISKONCHIP_BBTWRITE - bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" - depends on MTD_NAND_DISKONCHIP - help - On DiskOnChip devices shipped with the INFTL filesystem (Millennium - and 2000 TSOP/Alon), Linux reserves some space at the end of the - device for the Bad Block Table (BBT). If you have existing INFTL - data on your device (created by non-Linux tools such as M-Systems' - DOS drivers), your data might overlap the area Linux wants to use for - the BBT. If this is a concern for you, leave this option disabled and - Linux will not write BBT data into this area. - The downside of leaving this option disabled is that if bad blocks - are detected by Linux, they will not be recorded in the BBT, which - could cause future problems. - Once you enable this option, new filesystems (INFTL or others, created - in Linux or other operating systems) will not use the reserved area. - The only reason not to enable this option is to prevent damage to - preexisting filesystems. - Even if you leave this disabled, you can enable BBT writes at module - load time (assuming you build diskonchip as a module) with the module - parameter "inftl_bbt_write=1". - config MTD_NAND_SHARPSL - tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" + tristate "Sharp SL Series (C7xx + others) NAND controller" depends on ARCH_PXA || COMPILE_TEST depends on HAS_IOMEM config MTD_NAND_CAFE - tristate "NAND support for OLPC CAFÉ chip" + tristate "OLPC CAFÉ NAND controller" depends on PCI select REED_SOLOMON select REED_SOLOMON_DEC16 @@ -242,7 +144,7 @@ config MTD_NAND_CAFE laptop. config MTD_NAND_CS553X - tristate "NAND support for CS5535/CS5536 (AMD Geode companion chip)" + tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" depends on X86_32 depends on !UML && HAS_IOMEM help @@ -256,7 +158,7 @@ config MTD_NAND_CS553X If you say "m", the module will be called cs553x_nand. config MTD_NAND_ATMEL - tristate "Support for NAND Flash / SmartMedia on AT91" + tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" depends on ARCH_AT91 || COMPILE_TEST depends on HAS_IOMEM select GENERIC_ALLOCATOR @@ -265,8 +167,17 @@ config MTD_NAND_ATMEL Enables support for NAND Flash / Smart Media Card interface on Atmel AT91 processors. +config MTD_NAND_ORION + tristate "Marvell Orion NAND controller" + depends on PLAT_ORION + help + This enables the NAND flash controller on Orion machines. + + No board specific support is done by this driver, each board + must advertise a platform_device for the driver to attach. + config MTD_NAND_MARVELL - tristate "NAND controller support on Marvell boards" + tristate "Marvell EBU NAND controller" depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ COMPILE_TEST depends on HAS_IOMEM @@ -278,7 +189,7 @@ config MTD_NAND_MARVELL - 64-bit Aramda platforms (7k, 8k) (NFCv2) config MTD_NAND_SLC_LPC32XX - tristate "NXP LPC32xx SLC Controller" + tristate "NXP LPC32xx SLC NAND controller" depends on ARCH_LPC32XX || COMPILE_TEST depends on HAS_IOMEM help @@ -290,7 +201,7 @@ config MTD_NAND_SLC_LPC32XX by the SLC NAND controller. config MTD_NAND_MLC_LPC32XX - tristate "NXP LPC32xx MLC Controller" + tristate "NXP LPC32xx MLC NAND controller" depends on ARCH_LPC32XX || COMPILE_TEST depends on HAS_IOMEM help @@ -302,38 +213,23 @@ config MTD_NAND_MLC_LPC32XX by the MLC NAND controller. config MTD_NAND_CM_X270 - tristate "Support for NAND Flash on CM-X270 modules" + tristate "CM-X270 modules NAND controller" depends on MACH_ARMCORE config MTD_NAND_PASEMI - tristate "NAND support for PA Semi PWRficient" + tristate "PA Semi PWRficient NAND controller" depends on PPC_PASEMI help Enables support for NAND Flash interface on PA Semi PWRficient based boards config MTD_NAND_TMIO - tristate "NAND Flash device on Toshiba Mobile IO Controller" + tristate "Toshiba Mobile IO NAND controller" depends on MFD_TMIO help Support for NAND flash connected to a Toshiba Mobile IO Controller in some PDAs, including the Sharp SL6000x. -config MTD_NAND_NANDSIM - tristate "Support for NAND Flash Simulator" - help - The simulator may simulate various NAND flash chips for the - MTD nand layer. - -config MTD_NAND_GPMI_NAND - tristate "GPMI NAND Flash Controller driver" - depends on MXS_DMA - help - Enables NAND Flash support for IMX23, IMX28 or IMX6. - The GPMI controller is very powerful, with the help of BCH - module, it can do the hardware ECC. The GPMI supports several - NAND flashs at the same time. - config MTD_NAND_BRCMNAND tristate "Broadcom STB NAND controller" depends on ARM || ARM64 || MIPS || COMPILE_TEST @@ -344,7 +240,7 @@ config MTD_NAND_BRCMNAND BCM3xxx, BCM63xxx, iProc/Cygnus and more. config MTD_NAND_BCM47XXNFLASH - tristate "Support for NAND flash on BCM4706 BCMA bus" + tristate "BCM4706 BCMA NAND controller" depends on BCMA_NFLASH depends on BCMA help @@ -352,32 +248,31 @@ config MTD_NAND_BCM47XXNFLASH registered by bcma as platform devices. This enables driver for NAND flash memories. For now only BCM4706 is supported. -config MTD_NAND_PLATFORM - tristate "Support for generic platform NAND driver" +config MTD_NAND_OXNAS + tristate "Oxford Semiconductor NAND controller" + depends on ARCH_OXNAS || COMPILE_TEST depends on HAS_IOMEM help - This implements a generic NAND driver for on-SOC platform - devices. You will need to provide platform-specific functions - via platform_data. + This enables the NAND flash controller on Oxford Semiconductor SoCs. -config MTD_NAND_ORION - tristate " |