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authorChaotian Jing <chaotian.jing@mediatek.com>2015-10-27 14:24:28 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2015-10-27 10:38:41 +0100
commit9979dbe5158899b556eb772b7335e29417ac0ddd (patch)
tree23c3b19e0caeb3b6ed96db532eafbfdd7c300aca /drivers/mmc/host/sdhci-sirf.c
parentc9b5061e7728da1f7192ecaf3ffab4a7300920dc (diff)
mmc: mmc: extend the mmc_send_tuning()
The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() to determine the opcode by bus width, assume eMMC was running at HS200, 4bit mode, then the mmc_send_tuning() will overwrite the opcode from CMD21 to CMD19, then got error. in addition, extend an argument of "cmd_error" to allow getting if there was cmd error when tune response. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> [Ulf: Rebased patch] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-sirf.c')
-rw-r--r--drivers/mmc/host/sdhci-sirf.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
index f5488c409fd1..34866f668dd7 100644
--- a/drivers/mmc/host/sdhci-sirf.c
+++ b/drivers/mmc/host/sdhci-sirf.c
@@ -98,7 +98,7 @@ retry:
clock_setting | phase,
SDHCI_CLK_DELAY_SETTING);
- if (!mmc_send_tuning(mmc)) {
+ if (!mmc_send_tuning(mmc, opcode, NULL)) {
/* Tuning is successful at this tuning point */
tuned_phase_cnt++;
dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",