diff options
author | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-01-27 02:33:18 -0300 |
---|---|---|
committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-03-04 14:40:00 -0300 |
commit | 244c0e06bfd4e5bce46914bb11b0aac7de73831e (patch) | |
tree | 48fbe3991a2a70542dc846655859921c9cd94431 /drivers/media/dvb-frontends | |
parent | 80bff4b07595cf086e5d1cda4fd6e740affff5c5 (diff) |
[media] drx-j: get rid of function wrappers
On several places, the I2C functions are just wrappers to others.
Get rid of it.
Acked-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/dvb-frontends')
-rw-r--r-- | drivers/media/dvb-frontends/drx39xyj/drx_driver.h | 2 | ||||
-rw-r--r-- | drivers/media/dvb-frontends/drx39xyj/drxj.c | 2210 |
2 files changed, 1026 insertions, 1186 deletions
diff --git a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h index f3098b6bd006..8419989b4c38 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drx_driver.h +++ b/drivers/media/dvb-frontends/drx39xyj/drx_driver.h @@ -1940,8 +1940,6 @@ struct drx_demod_instance; * \struct struct drx_demod_instance * \brief Top structure of demodulator instance. */ struct drx_demod_instance { - /* type specific demodulator data */ - struct drx_access_func *my_access_funct; /**< data access protocol functions */ struct i2c_device_addr *my_i2c_dev_addr; /**< i2c address and device identifier */ diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c index 8dc53345dd06..7a28c20d2594 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drxj.c +++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c @@ -226,12 +226,6 @@ DEFINES #define DRXJ_SCAN_TIMEOUT 1000 /** -* \def DRXJ_DAP -* \brief Name of structure containing all data access protocol functions. -*/ -#define DRXJ_DAP drx_dap_drxj_funct_g - -/** * \def HI_I2C_DELAY * \brief HI timing delay for I2C timing (in nano seconds) * @@ -535,70 +529,38 @@ GLOBAL VARIABLES * DRXJ DAP structures */ -static int drxj_dap_read_block(struct i2c_device_addr *dev_addr, +static int drxdap_fasi_read_block(struct i2c_device_addr *dev_addr, u32 addr, u16 datasize, u8 *data, u32 flags); -static int drxj_dap_read_modify_write_reg8(struct i2c_device_addr *dev_addr, - u32 waddr, - u32 raddr, - u8 wdata, u8 *rdata); static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr, u32 waddr, u32 raddr, u16 wdata, u16 *rdata); -static int drxj_dap_read_modify_write_reg32(struct i2c_device_addr *dev_addr, - u32 waddr, - u32 raddr, - u32 wdata, u32 *rdata); - -static int drxj_dap_read_reg8(struct i2c_device_addr *dev_addr, - u32 addr, - u8 *data, u32 flags); - static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr, u32 addr, u16 *data, u32 flags); -static int drxj_dap_read_reg32(struct i2c_device_addr *dev_addr, +static int drxdap_fasi_read_reg32(struct i2c_device_addr *dev_addr, u32 addr, u32 *data, u32 flags); -static int drxj_dap_write_block(struct i2c_device_addr *dev_addr, +static int drxdap_fasi_write_block(struct i2c_device_addr *dev_addr, u32 addr, u16 datasize, u8 *data, u32 flags); -static int drxj_dap_write_reg8(struct i2c_device_addr *dev_addr, - u32 addr, - u8 data, u32 flags); - static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr, u32 addr, u16 data, u32 flags); -static int drxj_dap_write_reg32(struct i2c_device_addr *dev_addr, +static int drxdap_fasi_write_reg32(struct i2c_device_addr *dev_addr, u32 addr, u32 data, u32 flags); -/* The structure containing the protocol interface */ -struct drx_access_func drx_dap_drxj_funct_g = { - drxj_dap_write_block, /* Supported */ - drxj_dap_read_block, /* Supported */ - drxj_dap_write_reg8, /* Not supported */ - drxj_dap_read_reg8, /* Not supported */ - drxj_dap_read_modify_write_reg8, /* Not supported */ - drxj_dap_write_reg16, /* Supported */ - drxj_dap_read_reg16, /* Supported */ - drxj_dap_read_modify_write_reg16, /* Supported */ - drxj_dap_write_reg32, /* Supported */ - drxj_dap_read_reg32, /* Supported */ - drxj_dap_read_modify_write_reg32, /* Not supported */ -}; - struct drxj_data drxj_data_g = { false, /* has_lna : true if LNA (aka PGA) present */ false, /* has_oob : true if OOB supported */ @@ -929,7 +891,6 @@ struct drx_common_attr drxj_default_comm_attr_g = { * \brief Default drxj demodulator instance. */ struct drx_demod_instance drxj_default_demod_g = { - &DRXJ_DAP, /* data access protocol functions */ &drxj_default_addr_g, /* i2c address & device id */ &drxj_default_comm_attr_g, /* demod common attributes */ &drxj_data_g /* demod device specific attributes */ @@ -1540,43 +1501,6 @@ bool is_handled_by_aud_tr_if(u32 addr) /*============================================================================*/ -/* Functions not supported by protocol*/ - -static int drxdap_fasi_write_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */ - u32 addr, /* address of register */ - u8 data, /* data to write */ - u32 flags) -{ /* special device flags */ - return -EIO; -} - -static int drxdap_fasi_read_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */ - u32 addr, /* address of register */ - u8 *data, /* buffer to receive data */ - u32 flags) -{ /* special device flags */ - return -EIO; -} - -static int drxdap_fasi_read_modify_write_reg8(struct i2c_device_addr *dev_addr, /* address of I2C device */ - u32 waddr, /* address of register */ - u32 raddr, /* address to read back from */ - u8 datain, /* data to send */ - u8 *dataout) -{ /* data to receive back */ - return -EIO; -} - -static int drxdap_fasi_read_modify_write_reg32(struct i2c_device_addr *dev_addr, /* address of I2C device */ - u32 waddr, /* address of register */ - u32 raddr, /* address to read back from */ - u32 datain, /* data to send */ - u32 *dataout) -{ /* data to receive back */ - return -EIO; -} - - int drxbsp_i2c_write_read(struct i2c_device_addr *w_dev_addr, u16 w_count, u8 *wData, @@ -2073,27 +1997,6 @@ static int drxdap_fasi_write_reg32(struct i2c_device_addr *dev_addr, return drxdap_fasi_write_block(dev_addr, addr, sizeof(data), buf, flags); } -static int drxj_dap_read_block(struct i2c_device_addr *dev_addr, - u32 addr, - u16 datasize, - u8 *data, u32 flags) -{ - return drxdap_fasi_read_block(dev_addr, - addr, datasize, data, flags); -} - -/*============================================================================*/ - -static int drxj_dap_read_modify_write_reg8(struct i2c_device_addr *dev_addr, - u32 waddr, - u32 raddr, - u8 wdata, u8 *rdata) -{ - return drxdap_fasi_read_modify_write_reg8(dev_addr, - waddr, - raddr, wdata, rdata); -} - /*============================================================================*/ /** @@ -2172,26 +2075,6 @@ static int drxj_dap_read_modify_write_reg16(struct i2c_device_addr *dev_addr, #endif } -/*============================================================================*/ - -static int drxj_dap_read_modify_write_reg32(struct i2c_device_addr *dev_addr, - u32 waddr, - u32 raddr, - u32 wdata, u32 *rdata) -{ - return drxdap_fasi_read_modify_write_reg32(dev_addr, - waddr, - raddr, wdata, rdata); -} - -/*============================================================================*/ - -static int drxj_dap_read_reg8(struct i2c_device_addr *dev_addr, - u32 addr, - u8 *data, u32 flags) -{ - return drxdap_fasi_read_reg8(dev_addr, addr, data, flags); -} /*============================================================================*/ @@ -2296,41 +2179,10 @@ static int drxj_dap_read_reg16(struct i2c_device_addr *dev_addr, if (is_handled_by_aud_tr_if(addr)) stat = drxj_dap_read_aud_reg16(dev_addr, addr, data); else - stat = drxdap_fasi_read_reg16(dev_addr, - addr, data, flags); + stat = drxdap_fasi_read_reg16(dev_addr, addr, data, flags); return stat; } - -/*============================================================================*/ - -static int drxj_dap_read_reg32(struct i2c_device_addr *dev_addr, - u32 addr, - u32 *data, u32 flags) -{ - return drxdap_fasi_read_reg32(dev_addr, addr, data, flags); -} - -/*============================================================================*/ - -static int drxj_dap_write_block(struct i2c_device_addr *dev_addr, - u32 addr, - u16 datasize, - u8 *data, u32 flags) -{ - return drxdap_fasi_write_block(dev_addr, - addr, datasize, data, flags); -} - -/*============================================================================*/ - -static int drxj_dap_write_reg8(struct i2c_device_addr *dev_addr, - u32 addr, - u8 data, u32 flags) -{ - return drxdap_fasi_write_reg8(dev_addr, addr, data, flags); -} - /*============================================================================*/ /** @@ -2413,15 +2265,6 @@ static int drxj_dap_write_reg16(struct i2c_device_addr *dev_addr, /*============================================================================*/ -static int drxj_dap_write_reg32(struct i2c_device_addr *dev_addr, - u32 addr, - u32 data, u32 flags) -{ - return drxdap_fasi_write_reg32(dev_addr, addr, data, flags); -} - -/*============================================================================*/ - /* Free data ram in SIO HI */ #define SIO_HI_RA_RAM_USR_BEGIN__A 0x420040 #define SIO_HI_RA_RAM_USR_END__A 0x420060 @@ -2627,34 +2470,34 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16 case SIO_HI_RA_RAM_CMD_CONFIG: case SIO_HI_RA_RAM_CMD_ATOMIC_COPY: - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_6__A, cmd->param6, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_6__A, cmd->param6, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_5__A, cmd->param5, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_5__A, cmd->param5, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_4__A, cmd->param4, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_4__A, cmd->param4, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_3__A, cmd->param3, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_3__A, cmd->param3, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* fallthrough */ case SIO_HI_RA_RAM_CMD_BRDCTRL: - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_PAR_1__A, cmd->param1, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_1__A, cmd->param1, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2670,7 +2513,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16 } /* Write command */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_HI_RA_RAM_CMD__A, cmd->cmd, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_CMD__A, cmd->cmd, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2693,7 +2536,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16 goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_HI_RA_RAM_CMD__A, &wait_cmd, 0); + rc = drxj_dap_read_reg16(dev_addr, SIO_HI_RA_RAM_CMD__A, &wait_cmd, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2701,7 +2544,7 @@ hi_command(struct i2c_device_addr *dev_addr, const struct drxj_hi_cmd *cmd, u16 } while (wait_cmd != 0); /* Read result */ - rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_HI_RA_RAM_RES__A, result, 0); + rc = drxj_dap_read_reg16(dev_addr, SIO_HI_RA_RAM_RES__A, result, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2739,7 +2582,7 @@ static int init_hi(const struct drx_demod_instance *demod) dev_addr = demod->my_i2c_dev_addr; /* PATCH for bug 5003, HI ucode v3.1.0 */ - rc = DRXJ_DAP.write_reg16func(dev_addr, 0x4301D7, 0x801, 0); + rc = drxj_dap_write_reg16(dev_addr, 0x4301D7, 0x801, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2825,17 +2668,17 @@ static int get_device_capabilities(struct drx_demod_instance *demod) ext_attr = (struct drxj_data *) demod->my_ext_attr; dev_addr = demod->my_i2c_dev_addr; - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_OHW_CFG__A, &sio_pdr_ohw_cfg, 0); + rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_OHW_CFG__A, &sio_pdr_ohw_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2865,7 +2708,7 @@ static int get_device_capabilities(struct drx_demod_instance *demod) Determine device capabilities Based on pinning v47 */ - rc = DRXJ_DAP.read_reg32func(dev_addr, SIO_TOP_JTAGID_LO__A, &sio_top_jtagid_lo, 0); + rc = drxdap_fasi_read_reg32(dev_addr, SIO_TOP_JTAGID_LO__A, &sio_top_jtagid_lo, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -2874,18 +2717,18 @@ static int get_device_capabilities(struct drx_demod_instance *demod) switch ((sio_top_jtagid_lo >> 12) & 0xFF) { case 0x31: - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, SIO_PDR_UIO_IN_HI__A, &bid, 0); + rc = drxj_dap_read_reg16(dev_addr, SIO_PDR_UIO_IN_HI__A, &bid, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } bid = (bid >> 10) & 0xf; - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3121,51 +2964,51 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o return 0; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_OCR_INVERT__A, 0, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_OCR_INVERT__A, 0, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } switch (ext_attr->standard) { case DRX_STANDARD_8VSB: - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_USAGE__A, 7, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, 7, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* 2048 bytes fifo ram */ - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, 10, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, 10, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 10, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 10, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_A__A, 5, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_A__A, 5, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_B__A, 7, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_B__A, 7, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, 10, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, 10, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Low Water Mark for synchronization */ - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_LWM__A, 3, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_LWM__A, 3, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* High Water Mark for synchronization */ - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_HWM__A, 5, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_HWM__A, 5, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3198,50 +3041,50 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o (ext_attr->curr_symbol_rate / 8) * nr_bits * 188; /* pass through b/c Annex A/c need following settings */ case DRX_STANDARD_ITU_B: - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, FEC_OC_TMD_CTL_UPD_RATE__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_CTL_UPD_RATE__A, FEC_OC_TMD_CTL_UPD_RATE__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 5, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_TMD_INT_UPD_RATE__A, 5, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_A__A, FEC_OC_AVR_PARM_A__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_A__A, FEC_OC_AVR_PARM_A__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_AVR_PARM_B__A, FEC_OC_AVR_PARM_B__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_AVR_PARM_B__A, FEC_OC_AVR_PARM_B__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } if (cfg_data->static_clk == true) { - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, 0xD, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, 0xD, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } else { - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_RCN_GAIN__A, FEC_OC_RCN_GAIN__PRE, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_RCN_GAIN__A, FEC_OC_RCN_GAIN__PRE, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_LWM__A, 2, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_LWM__A, 2, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_HWM__A, 12, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_HWM__A, 12, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3252,12 +3095,12 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o } /* swtich (standard) */ /* Check insertion of the Reed-Solomon parity bytes */ - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_MODE__A, &fec_oc_reg_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_reg_ipr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3413,70 +3256,70 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o dto_rate = frac28(bit_rate, common_attr->sys_clock_freq * 1000); dto_rate >>= 3; - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_RATE_HI__A, (u16)((dto_rate >> 16) & FEC_OC_DTO_RATE_HI__M), 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_RATE_HI__A, (u16)((dto_rate >> 16) & FEC_OC_DTO_RATE_HI__M), 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_RATE_LO__A, (u16)(dto_rate & FEC_OC_DTO_RATE_LO_RATE_LO__M), 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_RATE_LO__A, (u16)(dto_rate & FEC_OC_DTO_RATE_LO_RATE_LO__M), 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M | FEC_OC_DTO_MODE_OFFSET_ENABLE__M, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M | FEC_OC_DTO_MODE_OFFSET_ENABLE__M, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_MODE__A, FEC_OC_FCT_MODE_RAT_ENA__M | FEC_OC_FCT_MODE_VIRT_ENA__M, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_MODE__A, FEC_OC_FCT_MODE_RAT_ENA__M | FEC_OC_FCT_MODE_VIRT_ENA__M, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) fec_oc_dto_period = ext_attr->mpeg_output_clock_rate - 1; - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } else { /* Dynamic mode */ - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DTO_MODE__A, FEC_OC_DTO_MODE_DYNAMIC__M, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_FCT_MODE__A, 0, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_MODE__A, 0, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } - rc = DRXJ_DAP.write_reg32func(dev_addr, FEC_OC_RCN_CTL_RATE_LO__A, rcn_rate, 0); + rc = drxdap_fasi_write_reg32(dev_addr, FEC_OC_RCN_CTL_RATE_LO__A, rcn_rate, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Write appropriate registers with requested configuration */ - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_MODE__A, fec_oc_reg_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3484,28 +3327,28 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o /* enabling for both parallel and serial now */ /* Write magic word to enable pdr reg write */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Set MPEG TS pads to outputmode */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0013, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0013, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MERR_CFG__A, 0x0013, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MERR_CFG__A, 0x0013, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MCLK_CFG__A, MPEG_OUTPUT_CLK_DRIVE_STRENGTH << SIO_PDR_MCLK_CFG_DRIVE__B | 0x03 << SIO_PDR_MCLK_CFG_MODE__B, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, MPEG_OUTPUT_CLK_DRIVE_STRENGTH << SIO_PDR_MCLK_CFG_DRIVE__B | 0x03 << SIO_PDR_MCLK_CFG_MODE__B, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0013, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0013, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3513,7 +3356,7 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o sio_pdr_md_cfg = MPEG_SERIAL_OUTPUT_PIN_DRIVE_STRENGTH << SIO_PDR_MD0_CFG_DRIVE__B | 0x03 << SIO_PDR_MD0_CFG_MODE__B; - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3523,171 +3366,171 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o MPEG_PARALLEL_OUTPUT_PIN_DRIVE_STRENGTH << SIO_PDR_MD0_CFG_DRIVE__B | 0x03 << SIO_PDR_MD0_CFG_MODE__B; - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, sio_pdr_md_cfg, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, sio_pdr_md_cfg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } else { /* MPEG data output is serial -> set MD1 to MD7 to tri-state */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } /* Enable Monitor Bus output over MPEG pads and ctl input */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Write nomagic word to enable pdr reg write */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } } else { /* Write magic word to enable pdr reg write */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0xFABA, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Set MPEG TS pads to inputmode */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MSTRT_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MERR_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MERR_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MCLK_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MCLK_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MVAL_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD0_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD0_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD1_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD2_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD3_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD4_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD5_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD6_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MD7_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Enable Monitor Bus output over MPEG pads and ctl input */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_PDR_MON_CFG__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } /* Write nomagic word to enable pdr reg write */ - rc = DRXJ_DAP.write_reg16func(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); + rc = drxj_dap_write_reg16(dev_addr, SIO_TOP_COMM_KEY__A, 0x0000, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3758,7 +3601,7 @@ ctrl_get_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o goto rw_error; } if ((lock_status == DRX_LOCKED)) { - rc = DRXJ_DAP.read_reg32func(dev_addr, FEC_OC_RCN_DYN_RATE_LO__A, &rate_reg, 0); + rc = drxdap_fasi_read_reg32(dev_addr, FEC_OC_RCN_DYN_RATE_LO__A, &rate_reg, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3804,17 +3647,17 @@ static int set_mpegtei_handling(struct drx_demod_instance *demod) dev_addr = demod->my_i2c_dev_addr; ext_attr = (struct drxj_data *) demod->my_ext_attr; - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_DPR_MODE__A, &fec_oc_dpr_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_DPR_MODE__A, &fec_oc_dpr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_SNC_MODE__A, &fec_oc_snc_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_EMS_MODE__A, &fec_oc_ems_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_EMS_MODE__A, &fec_oc_ems_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3834,17 +3677,17 @@ static int set_mpegtei_handling(struct drx_demod_instance *demod) fec_oc_ems_mode |= ((0x01) << (FEC_OC_EMS_MODE_MODE__B)); } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DPR_MODE__A, fec_oc_dpr_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_DPR_MODE__A, fec_oc_dpr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_SNC_MODE__A, fec_oc_snc_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; } - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_EMS_MODE__A, fec_oc_ems_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_EMS_MODE__A, fec_oc_ems_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3875,7 +3718,7 @@ static int bit_reverse_mpeg_output(struct drx_demod_instance *demod) dev_addr = demod->my_i2c_dev_addr; ext_attr = (struct drxj_data *) demod->my_ext_attr; - rc = DRXJ_DAP.read_reg16func(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode, 0); + rc = drxj_dap_read_reg16(dev_addr, FEC_OC_IPR_MODE__A, &fec_oc_ipr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3887,7 +3730,7 @@ static int bit_reverse_mpeg_output(struct drx_demod_instance *demod) if (ext_attr->bit_reverse_mpeg_outout) fec_oc_ipr_mode |= FEC_OC_IPR_MODE_REVERSE_ORDER__M; - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode, 0); + rc = drxj_dap_write_reg16(dev_addr, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode, 0); if (rc != 0) { pr_err("error %d\n", rc); goto rw_error; @@ -3919,7 +3762,7 @@ static int set_mpeg_output_clock_rate(struct drx_demod_instance *demod) ext_attr = (struct drxj_data *) demod->my_ext_attr; if (ext_attr->mpeg_output_clock_rate != DRXJ_MPEGOUTPUT_CLOCK_RATE_AUTO) { - rc = DRXJ_DAP.write_reg16func(dev_addr, FEC_OC_DTO_PERIOD__A, ext_attr->m |