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author | Robin Murphy <robin.murphy@arm.com> | 2019-08-15 19:37:23 +0100 |
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committer | Will Deacon <will@kernel.org> | 2019-08-19 16:52:47 +0100 |
commit | 0caf5f4e84fe0a870917984abf1f0eb29fa6e375 (patch) | |
tree | 4dce98d1691432a30e8d740c6ecbb73407341ea1 /drivers/iommu/intel-pasid.c | |
parent | a5b396ce5001a8b8c8594c7fa90b0df61d6b3272 (diff) |
iommu/arm-smmu: Convert GR0 registers to bitfields
FIELD_PREP remains a terrible name, but the overall simplification will
make further work on this stuff that much more manageable. This also
serves as an audit of the header, wherein we can impose a consistent
grouping and ordering of the offset and field definitions
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/intel-pasid.c')
0 files changed, 0 insertions, 0 deletions