diff options
| author | Joseph Gravenor <joseph.gravenor@amd.com> | 2019-09-16 15:13:33 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-10 19:33:23 -0500 |
| commit | ac81c2a75bcc9dce5ea80282b7d181e78b37c166 (patch) | |
| tree | 24da7b9ba2039ee26a40a009604353671a0bd1ca /drivers/gpu | |
| parent | 57133a28bcaf6e692b161e35c6778ee54b47f9e6 (diff) | |
drm/amd/display: add guard for SMU ver, for 48mhz clk
[why]
dp_48m_refclk_driver_pwdn is persistent through S3 and S5.
This was worked arround in SMU FW 55.21.0. Earlier FW don't have this fix
so we will hang on reboot
[how]
add a guard for smu versions before SMU FW 55.21.0
Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c index a2a4c7ddc856..68d38239304c 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c @@ -649,7 +649,7 @@ void rn_clk_mgr_construct( pp_smu->rn_funcs.set_wm_ranges(&pp_smu->rn_funcs.pp_smu, &ranges); } - if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { + if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment) && clk_mgr->smu_ver >= 0x00371500) { /* enable powerfeatures when displaycount goes to 0 */ rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(clk_mgr, !debug->disable_48mhz_pwrdwn); } |