diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2020-10-30 18:12:07 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2020-11-04 16:00:55 -0800 |
| commit | 0e720ea8de07843cf5e0c324ff44bec2b6a7e767 (patch) | |
| tree | 981b66fa674125a9ad22222c3cd179988edb9670 /drivers/gpu/drm/msm/dsi | |
| parent | 5785dd7a8ef0de8049f40a1a109de6a1bf17b479 (diff) | |
drm/msm/dsi: do not try reading 28nm vco rate if it's not enabled
Reading VCO rate for this PLL can cause boot stalls, if it is not
enabled. Guard clk_hw_get_rate with a call to
dsi_pll_28nm_clk_is_enabled().
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c index 6dffd7f4a99b..37a1f996a588 100644 --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm.c @@ -447,7 +447,10 @@ static void dsi_pll_28nm_save_state(struct msm_dsi_pll *pll) cached_state->postdiv1 = pll_read(base + REG_DSI_28nm_PHY_PLL_POSTDIV1_CFG); cached_state->byte_mux = pll_read(base + REG_DSI_28nm_PHY_PLL_VREG_CFG); - cached_state->vco_rate = clk_hw_get_rate(&pll->clk_hw); + if (dsi_pll_28nm_clk_is_enabled(&pll->clk_hw)) + cached_state->vco_rate = clk_hw_get_rate(&pll->clk_hw); + else + cached_state->vco_rate = 0; } static int dsi_pll_28nm_restore_state(struct msm_dsi_pll *pll) |