diff options
| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2019-05-28 11:27:36 +0300 |
|---|---|---|
| committer | Andrzej Hajda <a.hajda@samsung.com> | 2019-05-31 15:41:24 +0200 |
| commit | 31b4c8848a89be23b6706a86fc413f93115a6a1e (patch) | |
| tree | 1f40cddce22c0f588ed10b671bc5a66def30ad65 /drivers/gpu/drm/bridge/tc358767.c | |
| parent | 67bca92fa83089e7091e7210777b2f9ea17e5f87 (diff) | |
drm/bridge: tc358767: remove unnecessary msleep
For some reason the driver has a msleep(100) after writing to
DP_PHY_CTRL. Toshiba's documentation doesn't suggest any delay is
needed, and I have not seen any issues with the sleep removed.
Drop it, as msleep(100) is a rather big one.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190528082747.3631-14-tomi.valkeinen@ti.com
Diffstat (limited to 'drivers/gpu/drm/bridge/tc358767.c')
| -rw-r--r-- | drivers/gpu/drm/bridge/tc358767.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index ccf4c8cfbb52..a60a2e65e468 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -874,7 +874,6 @@ static int tc_main_link_enable(struct tc_data *tc) if (tc->link.base.num_lanes == 2) dp_phy_ctrl |= PHY_2LANE; tc_write(DP_PHY_CTRL, dp_phy_ctrl); - msleep(100); /* PLL setup */ tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN); |