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author | Manish Narani <manish.narani@xilinx.com> | 2020-07-15 00:42:33 +0530 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2020-07-24 11:53:33 +0200 |
commit | 88e1d0b175ec0bfa775c8629eae2a728726e2c6a (patch) | |
tree | bbd6faf9723d8acbbd09bf6bf160fd320ba74591 /drivers/firewire | |
parent | 907be2a62e4522c3dc3c298a213ccc741bd22732 (diff) |
mmc: sdhci-of-arasan: fix timings allocation code
The initial code that was adding delays was doing a cast over undefined
memory. This meant that the delays would be all gibberish.
This change, allocates all delays on the stack, and assigns them from the
ZynqMP & Versal macros/phase-list. And then finally copies them over the
common iclk_phase & oclk_phase variables.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Link: https://lore.kernel.org/r/1594753953-62980-1-git-send-email-manish.narani@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/firewire')
0 files changed, 0 insertions, 0 deletions