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authorSinan Kaya <okaya@codeaurora.org>2017-06-29 22:30:57 -0400
committerVinod Koul <vinod.koul@intel.com>2017-07-19 09:33:21 +0530
commit5e2db086be4fc77c7715297ffdf929e7a8a55041 (patch)
treec40fbb2b7072f517e7a527c3b2597f3cf11e8bad /drivers/dma/qcom/hidma.h
parent5771a8c08880cdca3bfb4a3fc6d309d6bba20877 (diff)
dmaengine: qcom_hidma: introduce memset support
HIDMA HW supports memset operation in addition to memcpy. Since the memset API is present on the kernel now, bring the memset feature into life. The descriptor format is the same for both memcpy and memset. Type of the descriptor is 4 when memset is requested. The lowest 8 bits of the source DMA argument is used as a fill pattern. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom/hidma.h')
-rw-r--r--drivers/dma/qcom/hidma.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/dma/qcom/hidma.h b/drivers/dma/qcom/hidma.h
index 41e0aa283828..5f9966e82c0b 100644
--- a/drivers/dma/qcom/hidma.h
+++ b/drivers/dma/qcom/hidma.h
@@ -28,6 +28,11 @@
#define HIDMA_TRE_DEST_LOW_IDX 4
#define HIDMA_TRE_DEST_HI_IDX 5
+enum tre_type {
+ HIDMA_TRE_MEMCPY = 3,
+ HIDMA_TRE_MEMSET = 4,
+};
+
struct hidma_tre {
atomic_t allocated; /* if this channel is allocated */
bool queued; /* flag whether this is pending */
@@ -150,7 +155,7 @@ void hidma_ll_start(struct hidma_lldev *llhndl);
int hidma_ll_disable(struct hidma_lldev *lldev);
int hidma_ll_enable(struct hidma_lldev *llhndl);
void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch,
- dma_addr_t src, dma_addr_t dest, u32 len, u32 flags);
+ dma_addr_t src, dma_addr_t dest, u32 len, u32 flags, u32 txntype);
void hidma_ll_setup_irq(struct hidma_lldev *lldev, bool msi);
int hidma_ll_setup(struct hidma_lldev *lldev);
struct hidma_lldev *hidma_ll_init(struct device *dev, u32 max_channels,