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authorStephen Boyd <sboyd@codeaurora.org>2015-11-30 17:31:41 -0800
committerStephen Boyd <sboyd@codeaurora.org>2015-11-30 18:24:29 -0800
commit55213e1acec9218580c90d36034aa0370a51daab (patch)
tree6666269d67fb2984891deecb65193508a513d920 /drivers/clk/qcom/mmcc-msm8996.c
parentb1e010c0730ab8861ef5a259ff5be7c78ccfb8ac (diff)
clk: qcom: Add gfx3d ping-pong PLL frequency switching
The GPU clocks on msm8996 have three dedicated PLLs, MMPLL2, MMPLL8, and MMPLL9. We leave MMPLL9 at the maximum speed (624 MHz), and we use MMPLL2 and MMPLL8 for the other frequencies. To make switching frequencies faster, we ping-pong between MMPLL2 and MMPLL8 when we're switching between frequencies that aren't the maximum. Implement custom rcg clk ops for this type of frequency switching. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/mmcc-msm8996.c')
0 files changed, 0 insertions, 0 deletions