diff options
author | Rajendra Nayak <rnayak@codeaurora.org> | 2016-11-21 12:07:12 +0530 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-23 11:00:06 -0800 |
commit | 5f5001a978fc966974b136c00cfb2134edd3f2bd (patch) | |
tree | 18a4fde4fe1abd2391d381871f13a2d221acb2f3 /drivers/clk/qcom/gcc-msm8974.c | |
parent | 081ba80206d6b53d45ee31bc6c90871e8cfbc117 (diff) |
clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops
The sdcc driver for msm8996/msm8916/msm8974/msm8994 and apq8084
expects a clk_set_rate() on the sdcc rcg clk to set
a floor value of supported clk rate closest to the requested
rate, by looking up the frequency table.
So move all the sdcc rcgs on all these platforms to use the
newly introduced clk_rcg2_floor_ops
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-msm8974.c')
-rw-r--r-- | drivers/clk/qcom/gcc-msm8974.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c index 00915209e7c5..348e30da4f18 100644 --- a/drivers/clk/qcom/gcc-msm8974.c +++ b/drivers/clk/qcom/gcc-msm8974.c @@ -872,7 +872,7 @@ static struct clk_init_data sdcc1_apps_clk_src_init = { .name = "sdcc1_apps_clk_src", .parent_names = gcc_xo_gpll0, .num_parents = 2, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }; static struct clk_rcg2 sdcc1_apps_clk_src = { @@ -894,7 +894,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = { .name = "sdcc2_apps_clk_src", .parent_names = gcc_xo_gpll0, .num_parents = 2, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -908,7 +908,7 @@ static struct clk_rcg2 sdcc3_apps_clk_src = { .name = "sdcc3_apps_clk_src", .parent_names = gcc_xo_gpll0, .num_parents = 2, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -922,7 +922,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = { .name = "sdcc4_apps_clk_src", .parent_names = gcc_xo_gpll0, .num_parents = 2, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; |