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authorChang S. Bae <chang.seok.bae@intel.com>2020-05-28 16:13:50 -0400
committerThomas Gleixner <tglx@linutronix.de>2020-06-18 15:47:00 +0200
commit58edfd2e0a93c9adc2f29902a0335af0584041a0 (patch)
tree0ae2e3253335dcb13bb2e38034766f6d618f798e /arch/x86/kvm/vmx
parentb15378ca50810c1350086cafad3fe19979262a83 (diff)
x86/fsgsbase/64: Enable FSGSBASE instructions in helper functions
Add cpu feature conditional FSGSBASE access to the relevant helper functions. That allows to accelerate certain FS/GS base operations in subsequent changes. Note, that while possible, the user space entry/exit GSBASE operations are not going to use the new FSGSBASE instructions. The reason is that it would require additional storage for the user space value which adds more complexity to the low level code and experiments have shown marginal benefit. This may be revisited later but for now the SWAPGS based handling in the entry code is preserved except for the paranoid entry/exit code. To preserve the SWAPGS entry mechanism introduce __[rd|wr]gsbase_inactive() helpers. Note, for Xen PV, paravirt hooks can be added later as they might allow a very efficient but different implementation. [ tglx: Massaged changelog, convert it to noinstr and force inline native_swapgs() ] Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sasha Levin <sashal@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lkml.kernel.org/r/1557309753-24073-7-git-send-email-chang.seok.bae@intel.com Link: https://lkml.kernel.org/r/20200528201402.1708239-5-sashal@kernel.org
Diffstat (limited to 'arch/x86/kvm/vmx')
0 files changed, 0 insertions, 0 deletions