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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-26 10:29:47 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-12-26 10:29:47 -0800 |
| commit | 9830afca9273787f32e236ae5d0e4d3a378ae842 (patch) | |
| tree | 0215da65d6d4e2021f2543e78b7518d48f6f6ead /arch/riscv/lib/udivdi3.S | |
| parent | 30807ef2b76e01ea209fcad66a87e534ed1edb40 (diff) | |
| parent | 9b9afe4a0ef149db2472f13d6fa3c705d2867c9c (diff) | |
Merge tag 'riscv-for-linus-4.21-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt:
"We don't have many patches for this merge window, probably because
everything has been a bit busy with the holidays and conferences. The
only big user-visible change is to move over to an SBI-based earlycon
instead of our arch-specific early printk support.
The only outstanding patch set I know of is the audit patch set, which
I've managed to make a mess of and will attempt to clean up"
* tag 'riscv-for-linus-4.21-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
RISC-V: Select GENERIC_SCHED_CLOCK for clocksource drivers
RISC-V: lib: minor asm cleanup
RISC-V: Update Kconfig to better handle CMDLINE
riscv: remove unused variable in ftrace
RISC-V: add of_node_put()
RISC-V: Fix of_node_* refcount
riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants
RISC-V: Remove EARLY_PRINTK support
RISC-V: defconfig: Enable RISC-V SBI earlycon support
Diffstat (limited to 'arch/riscv/lib/udivdi3.S')
| -rw-r--r-- | arch/riscv/lib/udivdi3.S | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/riscv/lib/udivdi3.S b/arch/riscv/lib/udivdi3.S index cb01ae5b181a..7f1c0af182a3 100644 --- a/arch/riscv/lib/udivdi3.S +++ b/arch/riscv/lib/udivdi3.S @@ -11,28 +11,30 @@ * GNU General Public License for more details. */ - .globl __udivdi3 -__udivdi3: - mv a2, a1 - mv a1, a0 - li a0, -1 - beqz a2, .L5 - li a3, 1 - bgeu a2, a1, .L2 +#include <linux/linkage.h> + +ENTRY(__udivdi3) + mv a2, a1 + mv a1, a0 + li a0, -1 + beqz a2, .L5 + li a3, 1 + bgeu a2, a1, .L2 .L1: - blez a2, .L2 - slli a2, a2, 1 - slli a3, a3, 1 - bgtu a1, a2, .L1 + blez a2, .L2 + slli a2, a2, 1 + slli a3, a3, 1 + bgtu a1, a2, .L1 .L2: - li a0, 0 + li a0, 0 .L3: - bltu a1, a2, .L4 - sub a1, a1, a2 - or a0, a0, a3 + bltu a1, a2, .L4 + sub a1, a1, a2 + or a0, a0, a3 .L4: - srli a3, a3, 1 - srli a2, a2, 1 - bnez a3, .L3 + srli a3, a3, 1 + srli a2, a2, 1 + bnez a3, .L3 .L5: - ret + ret +ENDPROC(__udivdi3) |