diff options
| author | James Hogan <james.hogan@imgtec.com> | 2016-06-15 19:29:58 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-06-15 23:58:37 +0200 |
| commit | 7414d2f65006ac8609196092f2869e0942599b72 (patch) | |
| tree | ded5f615069c23c970bd05563cd690330e37eee9 /arch/mips/kvm/tlb.c | |
| parent | 42aa12e74e91f790d239bfb852260d07573ce83f (diff) | |
MIPS: KVM: Use host CCA for TLB mappings
KVM TLB mappings for the guest were being created with a cache coherency
attribute (CCA) of 3, which is cached incoherent. Create them instead
with the default host CCA, which should be the correct one for coherency
on SMP systems.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/kvm/tlb.c')
| -rw-r--r-- | arch/mips/kvm/tlb.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c index 385fbd34e77d..9699352293e4 100644 --- a/arch/mips/kvm/tlb.c +++ b/arch/mips/kvm/tlb.c @@ -179,7 +179,8 @@ int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr, pfn = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT; pair_idx = (badvaddr >> PAGE_SHIFT) & 1; entrylo[pair_idx] = mips3_paddr_to_tlbpfn(pfn << PAGE_SHIFT) | - (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V; + ((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) | + ENTRYLO_D | ENTRYLO_V; local_irq_save(flags); |