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| author | Thomas Gleixner <tglx@linutronix.de> | 2018-01-27 15:35:29 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-01-27 15:35:29 +0100 |
| commit | 303c146df1c4574db3495d9acc5c440dd46c6b0f (patch) | |
| tree | fbcea289aea24da8a44c7677a776988bb3c8bcbe /arch/mips/kernel/cps-vec.S | |
| parent | b1a31a5f5f27ff8aba42b545a1c721941f735107 (diff) | |
| parent | d5421ea43d30701e03cadc56a38854c36a8b4433 (diff) | |
Merge branch 'timers/urgent' into timers/core
Pick up urgent bug fix and resolve the conflict.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/kernel/cps-vec.S')
| -rw-r--r-- | arch/mips/kernel/cps-vec.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index c7ed26029cbb..e68e6e04063a 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -235,6 +235,7 @@ LEAF(mips_cps_core_init) has_mt t0, 3f .set push + .set MIPS_ISA_LEVEL_RAW .set mt /* Only allow 1 TC per VPE to execute... */ @@ -388,6 +389,7 @@ LEAF(mips_cps_boot_vpes) #elif defined(CONFIG_MIPS_MT) .set push + .set MIPS_ISA_LEVEL_RAW .set mt /* If the core doesn't support MT then return */ |