diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2018-03-07 21:21:59 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2018-03-09 23:19:58 +0100 |
| commit | fd8773f9f544955f6f47dc2ac3ab85ad64376b7f (patch) | |
| tree | 2eedaf10b5a4b62df0d3b514cec9614a6af6b563 /arch/frv/kernel/gdb-io.h | |
| parent | 739d875dd6982618020d30f58f8acf10f6076e6d (diff) | |
arch: remove frv port
The Fujitsu FRV kernel port has been around for a long time, but has not
seen regular updates in several years and instead was marked 'Orphaned'
in 2016 by long-time maintainer David Howells.
The SoC product line apparently is apparently still around in the form
of the Socionext Milbeaut image processor, but this one no longer uses
the FRV CPU cores.
This removes all FRV specific files from the kernel.
Link: http://www.socionext.com/en/products/assp/milbeaut/
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/frv/kernel/gdb-io.h')
| -rw-r--r-- | arch/frv/kernel/gdb-io.h | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/arch/frv/kernel/gdb-io.h b/arch/frv/kernel/gdb-io.h deleted file mode 100644 index 138714bacc40..000000000000 --- a/arch/frv/kernel/gdb-io.h +++ /dev/null @@ -1,55 +0,0 @@ -/* gdb-io.h: FR403 GDB I/O port defs - * - * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _GDB_IO_H -#define _GDB_IO_H - -#include <asm/serial-regs.h> - -#undef UART_RX -#undef UART_TX -#undef UART_DLL -#undef UART_DLM -#undef UART_IER -#undef UART_IIR -#undef UART_FCR -#undef UART_LCR -#undef UART_MCR -#undef UART_LSR -#undef UART_MSR -#undef UART_SCR - -#define UART_RX 0*8 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0*8 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0*8 /* Out: Divisor Latch Low (DLAB=1) */ -#define UART_DLM 1*8 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IER 1*8 /* Out: Interrupt Enable Register */ -#define UART_IIR 2*8 /* In: Interrupt ID Register */ -#define UART_FCR 2*8 /* Out: FIFO Control Register */ -#define UART_LCR 3*8 /* Out: Line Control Register */ -#define UART_MCR 4*8 /* Out: Modem Control Register */ -#define UART_LSR 5*8 /* In: Line Status Register */ -#define UART_MSR 6*8 /* In: Modem Status Register */ -#define UART_SCR 7*8 /* I/O: Scratch Register */ - -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_SBC 0x40 /* Set break control */ -#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ -#define UART_LCR_EPAR 0x10 /* Even parity select */ -#define UART_LCR_PARITY 0x08 /* Parity Enable */ -#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ -#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ -#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ -#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ -#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ - - -#endif /* _GDB_IO_H */ |