summaryrefslogtreecommitdiffstats
path: root/arch/blackfin/include/asm/dma.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-10 17:06:08 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-10 17:06:08 -0800
commit0be8c8bd1de21d75ef14eb6af35b664f70a35746 (patch)
treefac1d514dcdb4146d4504f965a7f394c998c6b82 /arch/blackfin/include/asm/dma.h
parente54be894eae10eca9892e965cc9532f5d5a11767 (diff)
parenta780c6e86851c6479851186c5d5b9fb2b201bec7 (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (52 commits) Blackfin: encode cpu-rev into uImage name Blackfin: bf54x: don't ack GPIO ints when unmasking them Blackfin: sram_free_with_lsl: do not ignore return value of sram_free Blackfin: boards: add missing "static" to peripheral lists Blackfin: DNP5370: new board port Blackfin: bf518f-ezbrd: fix dsa resources Blackfin: move "-m elf32bfin" to general LDFLAGS Blackfin: kgdb_test: make sure to initialize num2 Blackfin: kgdb: disable preempt schedule when running single step in kgdb Blackfin: kgdb: disable interrupt when single stepping in ADEOS Blackfin: SMP: kgdb: apply anomaly 257 work around Blackfin: fix building IPIPE code when XIP is enabled Blackfin: SMP: kgdb: flush core internal write buffer before flushinv Blackfin: sport_uart resources: remove unused secondary RX/TX pins Blackfin: tll6527m: fix spelling in unused code (struct name) Blackfin: bf527-ezkit: add adau1373 chip address Blackfin: no-mpu: fix masking of small uncached dma region Blackfin: pm: drop irq save/restore in standby and suspend to mem callback MAINTAINERS: update Analog Devices support info Blackfin: dpmc.h: pull in new pll.h ...
Diffstat (limited to 'arch/blackfin/include/asm/dma.h')
-rw-r--r--arch/blackfin/include/asm/dma.h37
1 files changed, 2 insertions, 35 deletions
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index eedf3ca65ba2..d9dbc1a53534 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -14,40 +14,7 @@
#include <asm/blackfin.h>
#include <asm/page.h>
#include <asm-generic/dma.h>
-
-/* DMA_CONFIG Masks */
-#define DMAEN 0x0001 /* DMA Channel Enable */
-#define WNR 0x0002 /* Channel Direction (W/R*) */
-#define WDSIZE_8 0x0000 /* Transfer Word Size = 8 */
-#define WDSIZE_16 0x0004 /* Transfer Word Size = 16 */
-#define WDSIZE_32 0x0008 /* Transfer Word Size = 32 */
-#define DMA2D 0x0010 /* DMA Mode (2D/1D*) */
-#define RESTART 0x0020 /* DMA Buffer Clear */
-#define DI_SEL 0x0040 /* Data Interrupt Timing Select */
-#define DI_EN 0x0080 /* Data Interrupt Enable */
-#define NDSIZE_0 0x0000 /* Next Descriptor Size = 0 (Stop/Autobuffer) */
-#define NDSIZE_1 0x0100 /* Next Descriptor Size = 1 */
-#define NDSIZE_2 0x0200 /* Next Descriptor Size = 2 */
-#define NDSIZE_3 0x0300 /* Next Descriptor Size = 3 */
-#define NDSIZE_4 0x0400 /* Next Descriptor Size = 4 */
-#define NDSIZE_5 0x0500 /* Next Descriptor Size = 5 */
-#define NDSIZE_6 0x0600 /* Next Descriptor Size = 6 */
-#define NDSIZE_7 0x0700 /* Next Descriptor Size = 7 */
-#define NDSIZE_8 0x0800 /* Next Descriptor Size = 8 */
-#define NDSIZE_9 0x0900 /* Next Descriptor Size = 9 */
-#define NDSIZE 0x0f00 /* Next Descriptor Size */
-#define DMAFLOW 0x7000 /* Flow Control */
-#define DMAFLOW_STOP 0x0000 /* Stop Mode */
-#define DMAFLOW_AUTO 0x1000 /* Autobuffer Mode */
-#define DMAFLOW_ARRAY 0x4000 /* Descriptor Array Mode */
-#define DMAFLOW_SMALL 0x6000 /* Small Model Descriptor List Mode */
-#define DMAFLOW_LARGE 0x7000 /* Large Model Descriptor List Mode */
-
-/* DMA_IRQ_STATUS Masks */
-#define DMA_DONE 0x0001 /* DMA Completion Interrupt Status */
-#define DMA_ERR 0x0002 /* DMA Error Interrupt Status */
-#define DFETCH 0x0004 /* DMA Descriptor Fetch Indicator */
-#define DMA_RUN 0x0008 /* DMA Channel Running Indicator */
+#include <asm/bfin_dma.h>
/*-------------------------
* config reg bits value
@@ -149,7 +116,7 @@ void blackfin_dma_resume(void);
* DMA API's
*******************************************************************************/
extern struct dma_channel dma_ch[MAX_DMA_CHANNELS];
-extern struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS];
+extern struct dma_register * const dma_io_base_addr[MAX_DMA_CHANNELS];
extern int channel2irq(unsigned int channel);
static inline void set_dma_start_addr(unsigned int channel, unsigned long addr)