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| author | Horia Geantă <horia.geanta@nxp.com> | 2020-07-15 18:26:02 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-08-17 16:06:33 +0800 |
| commit | 79428026bdbd7802221e8c70b66eff4ed215494a (patch) | |
| tree | 39a6b265ce64814dd45b5ffdfc352f139dd3b403 /arch/arm | |
| parent | 82ffb35c2ce63ef8e0325f75eb48022abcf8edbe (diff) | |
ARM: dts: imx6sll: add rng
Add node for the RNGB block.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index fb5d3bc50c6b..0b622201a1f3 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -786,6 +786,13 @@ clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>; }; + rngb: rng@21b4000 { + compatible = "fsl,imx6sll-rngb", "fsl,imx25-rngb"; + reg = <0x021b4000 0x4000>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6SLL_CLK_DUMMY>; + }; + ocotp: efuse@21bc000 { #address-cells = <1>; #size-cells = <1>; |