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authorTakashi Iwai <tiwai@suse.de>2016-02-09 23:08:37 +0100
committerTakashi Iwai <tiwai@suse.de>2016-02-09 23:08:37 +0100
commit397da2d0ab0d1398242622d80a74df7245395c63 (patch)
tree51e01a67c653c67108f65d063b8b9cbfacf0b1a7 /arch/arm64/kernel/head.S
parentb8cb3750ce94d7610934465263850dcf40736bca (diff)
parent4dff5c7b7093b19c19d3a100f8a3ad87cb7cd9e7 (diff)
Merge branch 'topic/core-fixes' into for-linus
Diffstat (limited to 'arch/arm64/kernel/head.S')
-rw-r--r--arch/arm64/kernel/head.S5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index ffe9c2b6431b..917d98108b3f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -514,9 +514,14 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems
#endif
/* EL2 debug */
+ mrs x0, id_aa64dfr0_el1 // Check ID_AA64DFR0_EL1 PMUVer
+ sbfx x0, x0, #8, #4
+ cmp x0, #1
+ b.lt 4f // Skip if no PMU present
mrs x0, pmcr_el0 // Disable debug access traps
ubfx x0, x0, #11, #5 // to EL2 and allow access to
msr mdcr_el2, x0 // all PMU counters from EL1
+4:
/* Stage-2 translation */
msr vttbr_el2, xzr