diff options
author | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 12:01:10 +0200 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2014-07-26 12:01:27 +0200 |
commit | 96bda115ec552ff75319f85828f6c333d101b401 (patch) | |
tree | e30895f65413fdf8fd91c026faad1a3fb54b0653 /arch/arm/plat-samsung | |
parent | 8e5655cd4f7e140ceb24705f913406e9f56b7d54 (diff) | |
parent | f1ff47454bb2fe0d5644f981679d1bea532816fd (diff) |
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim:
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
* tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: samsung: s5pv210: Remove legacy board support
ARM: SAMSUNG: Remove remaining legacy code
gpio: samsung: Remove legacy support of S5PV210
ARM: S5PV210: Enable multi-platform build support
cpufreq: s5pv210: Make the driver multiplatform aware
ARM: S5PV210: Register cpufreq platform device
ARM: S5PV210: move debug-macro.S into the common space
ARM: S5PV210: Untie PM support from legacy code
ARM: S5PV210: Remove support for board files
ARM: dts: Add Device tree for s5pc110/s5pv210 boards
ARM: dts: Add Device tree for s5pv210 SoC
ARM: S5PV210: Add board file for boot using Device Tree
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
clk: samsung: Add S5PV210 Audio Subsystem clock driver
ARM: SAMSUNG: Remove legacy clock code
serial: samsung: Remove support for legacy clock code
cpufreq: s3c24xx: Remove some dead code
ARM: S5PV210: Migrate clock handling to Common Clock Framework
clk: samsung: Add clock driver for S5PV210 and compatible SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-samsung')
34 files changed, 14 insertions, 3418 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 1c629c2c270f..1091b0a3729a 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -6,30 +6,16 @@ config PLAT_SAMSUNG bool - depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS + depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 default y select GENERIC_IRQ_CHIP select NO_IOPORT_MAP help Base platform code for all Samsung SoC based systems -config PLAT_S5P - bool - depends on ARCH_S5PV210 - default y - select ARCH_REQUIRE_GPIOLIB - select ARM_VIC - select NO_IOPORT_MAP - select PLAT_SAMSUNG - select S3C_GPIO_TRACK - select S5P_GPIO_DRVSTR - select SAMSUNG_CLKSRC if !COMMON_CLK - help - Base platform code for Samsung's S5P series SoC. - config SAMSUNG_PM bool - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM) + depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) default y help Base platform power management code for samsung code @@ -65,48 +51,6 @@ config SAMSUNG_ATAGS if SAMSUNG_ATAGS -# clock options - -config SAMSUNG_CLOCK - bool - default y if !COMMON_CLK - -config SAMSUNG_CLKSRC - bool - help - Select the clock code for the clksrc implementation - used by newer systems such as the S3C64XX. - -config S5P_CLOCK - def_bool ARCH_S5PV210 - help - Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs - -# options for IRQ support - -config S5P_IRQ - def_bool ARCH_S5PV210 - help - Support common interrupt part for ARCH_S5P SoCs - -config S5P_EXT_INT - bool - help - Use the external interrupts (other than GPIO interrupts.) - -config S5P_GPIO_INT - bool - help - Common code for the GPIO interrupts (other than external interrupts.) - -# options for gpio configuration support - -config S5P_GPIO_DRVSTR - bool - help - Internal configuration to get and set correct GPIO driver strength - helper - config SAMSUNG_GPIO_EXTRA int "Number of additional GPIO pins" default 128 if SAMSUNG_GPIO_EXTRA128 @@ -138,12 +82,6 @@ config S3C_GPIO_TRACK Internal configuration option to enable the s3c specific gpio chip tracking if the platform requires it. -# uart options - -config S5P_DEV_UART - def_bool y - depends on ARCH_S5PV210 - # ADC driver config S3C_ADC @@ -301,66 +239,6 @@ config SAMSUNG_DEV_BACKLIGHT help Compile in platform device definition LCD backlight with PWM Timer -config S5P_DEV_CSIS0 - bool - help - Compile in platform device definitions for MIPI-CSIS channel 0 - -config S5P_DEV_CSIS1 - bool - help - Compile in platform device definitions for MIPI-CSIS channel 1 - -config S5P_DEV_FIMC0 - bool - help - Compile in platform device definitions for FIMC controller 0 - -config S5P_DEV_FIMC1 - bool - help - Compile in platform device definitions for FIMC controller 1 - -config S5P_DEV_FIMC2 - bool - help - Compile in platform device definitions for FIMC controller 2 - -config S5P_DEV_FIMC3 - bool - help - Compile in platform device definitions for FIMC controller 3 - -config S5P_DEV_FIMD0 - bool - help - Compile in platform device definitions for FIMD controller 0 - -config S5P_DEV_G2D - bool - help - Compile in platform device definitions for G2D device - -config S5P_DEV_I2C_HDMIPHY - bool - help - Compile in platform device definitions for I2C HDMIPHY controller - -config S5P_DEV_JPEG - bool - help - Compile in platform device definitions for JPEG codec - -config S5P_DEV_ONENAND - bool - help - Compile in platform device definition for OneNAND controller - -config S5P_DEV_TV - bool - help - Compile in platform device definition for TV interface - config S3C24XX_PWM bool "PWM device support" select PWM @@ -381,12 +259,6 @@ config S3C_DMA help Internal configuration for S3C DMA core -config S5P_IRQ_PM - bool - default y if S5P_PM - help - Legacy IRQ power management for S5P platforms - config SAMSUNG_PM_GPIO bool default y if GPIO_SAMSUNG && PM @@ -469,17 +341,6 @@ config SAMSUNG_WDT_RESET Compile support for system restart by triggering watchdog reset. Used on SoCs that do not provide dedicated reset control. -config S5P_PM - bool - help - Common code for power management support on S5P and newer SoCs - -config S5P_SLEEP - bool - help - Internal config node to apply common S5P sleep management code. - Can be selected by S5P and newer SoCs with similar sleep procedure. - config DEBUG_S3C_UART depends on PLAT_SAMSUNG int diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 5e5beaa9ae15..5fe175017f07 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -5,7 +5,6 @@ # Licensed under GPLv2 ccflags-$(CONFIG_ARCH_MULTI_V7) += -I$(srctree)/$(src)/include -ccflags-$(CONFIG_ARCH_EXYNOS) += -I$(srctree)/arch/arm/mach-exynos/include obj-y := obj-m := @@ -16,15 +15,6 @@ obj- := obj-y += init.o cpu.o -obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o - -obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o -obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o - -obj-$(CONFIG_S5P_IRQ) += s5p-irq.o -obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o -obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o - # ADC obj-$(CONFIG_S3C_ADC) += adc.o @@ -36,7 +26,6 @@ obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o -obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o @@ -58,7 +47,3 @@ obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o - -obj-$(CONFIG_S5P_PM) += s5p-pm.o -obj-$(CONFIG_S5P_IRQ_PM) += s5p-irq-pm.o -obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c deleted file mode 100644 index 786a4107a157..000000000000 --- a/arch/arm/plat-samsung/clock-clksrc.c +++ /dev/null @@ -1,212 +0,0 @@ -/* linux/arch/arm/plat-samsung/clock-clksrc.c - * - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <plat/clock.h> -#include <plat/clock-clksrc.h> -#include <plat/cpu-freq.h> - -static inline struct clksrc_clk *to_clksrc(struct clk *clk) -{ - return container_of(clk, struct clksrc_clk, clk); -} - -static inline u32 bit_mask(u32 shift, u32 nr_bits) -{ - u32 mask = 0xffffffff >> (32 - nr_bits); - - return mask << shift; -} - -static unsigned long s3c_getrate_clksrc(struct clk *clk) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long rate = clk_get_rate(clk->parent); - u32 clkdiv = __raw_readl(sclk->reg_div.reg); - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - - clkdiv &= mask; - clkdiv >>= sclk->reg_div.shift; - clkdiv++; - - rate /= clkdiv; - return rate; -} - -static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - void __iomem *reg = sclk->reg_div.reg; - unsigned int div; - u32 mask = bit_mask(sclk->reg_div.shift, sclk->reg_div.size); - u32 val; - - rate = clk_round_rate(clk, rate); - div = clk_get_rate(clk->parent) / rate; - if (div > (1 << sclk->reg_div.size)) - return -EINVAL; - - val = __raw_readl(reg); - val &= ~mask; - val |= (div - 1) << sclk->reg_div.shift; - __raw_writel(val, reg); - - return 0; -} - -static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - struct clksrc_sources *srcs = sclk->sources; - u32 clksrc = __raw_readl(sclk->reg_src.reg); - u32 mask = bit_mask(sclk->reg_src.shift, sclk->reg_src.size); - int src_nr = -1; - int ptr; - - for (ptr = 0; ptr < srcs->nr_sources; ptr++) - if (srcs->sources[ptr] == parent) { - src_nr = ptr; - break; - } - - if (src_nr >= 0) { - clk->parent = parent; - - clksrc &= ~mask; - clksrc |= src_nr << sclk->reg_src.shift; - - __raw_writel(clksrc, sclk->reg_src.reg); - return 0; - } - - return -EINVAL; -} - -static unsigned long s3c_roundrate_clksrc(struct clk *clk, - unsigned long rate) -{ - struct clksrc_clk *sclk = to_clksrc(clk); - unsigned long parent_rate = clk_get_rate(clk->parent); - int max_div = 1 << sclk->reg_div.size; - int div; - - if (rate >= parent_rate) - rate = parent_rate; - else { - div = parent_rate / rate; - if (parent_rate % rate) - div++; - - if (div == 0) - div = 1; - if (div > max_div) - div = max_div; - - rate = parent_rate / div; - } - - return rate; -} - -/* Clock initialisation code */ - -void __init_or_cpufreq s3c_set_clksrc(struct clksrc_clk *clk, bool announce) -{ - struct clksrc_sources *srcs = clk->sources; - u32 mask = bit_mask(clk->reg_src.shift, clk->reg_src.size); - u32 clksrc; - - if (!clk->reg_src.reg) { - if (!clk->clk.parent) - printk(KERN_ERR "%s: no parent clock specified\n", - clk->clk.name); - return; - } - - clksrc = __raw_readl(clk->reg_src.reg); - clksrc &= mask; - clksrc >>= clk->reg_src.shift; - - if (clksrc > srcs->nr_sources || !srcs->sources[clksrc]) { - printk(KERN_ERR "%s: bad source %d\n", - clk->clk.name, clksrc); - return; - } - - clk->clk.parent = srcs->sources[clksrc]; - - if (announce) - printk(KERN_INFO "%s: source is %s (%d), rate is %ld\n", - clk->clk.name, clk->clk.parent->name, clksrc, - clk_get_rate(&clk->clk)); -} - -static struct clk_ops clksrc_ops = { - .set_parent = s3c_setparent_clksrc, - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -static struct clk_ops clksrc_ops_nodiv = { - .set_parent = s3c_setparent_clksrc, -}; - -static struct clk_ops clksrc_ops_nosrc = { - .get_rate = s3c_getrate_clksrc, - .set_rate = s3c_setrate_clksrc, - .round_rate = s3c_roundrate_clksrc, -}; - -void __init s3c_register_clksrc(struct clksrc_clk *clksrc, int size) -{ - int ret; - - for (; size > 0; size--, clksrc++) { - if (!clksrc->reg_div.reg && !clksrc->reg_src.reg) - printk(KERN_ERR "%s: clock %s has no registers set\n", - __func__, clksrc->clk.name); - - /* fill in the default functions */ - - if (!clksrc->clk.ops) { - if (!clksrc->reg_div.reg) - clksrc->clk.ops = &clksrc_ops_nodiv; - else if (!clksrc->reg_src.reg) - clksrc->clk.ops = &clksrc_ops_nosrc; - else - clksrc->clk.ops = &clksrc_ops; - } - - /* setup the clocksource, but do not announce it - * as it may be re-set by the setup routines - * called after the rest of the clocks have been - * registered - */ - s3c_set_clksrc(clksrc, false); - - ret = s3c24xx_register_clock(&clksrc->clk); - - if (ret < 0) { - printk(KERN_ERR "%s: failed to register %s (%d)\n", - __func__, clksrc->clk.name, ret); - } - } -} diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c deleted file mode 100644 index d103ac1a52af..000000000000 --- a/arch/arm/plat-samsung/clock.c +++ /dev/null @@ -1,539 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/clock.c - * - * Copyright 2004-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX Core clock control support - * - * Based on, and code from linux/arch/arm/mach-versatile/clock.c - ** - ** Copyright (C) 2004 ARM Limited. - ** Written by Deep Blue Solutions Limited. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/device.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/clk.h> -#include <linux/spinlock.h> -#include <linux/io.h> -#if defined(CONFIG_DEBUG_FS) -#include <linux/debugfs.h> -#endif - -#include <asm/irq.h> - -#include <plat/cpu-freq.h> - -#include <plat/clock.h> -#include <plat/cpu.h> - -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> /* for s3c24xx_uart_devs */ - -/* clock information */ - -static LIST_HEAD(clocks); - -/* We originally used an mutex here, but some contexts (see resume) - * are calling functions such as clk_set_parent() with IRQs disabled - * causing an BUG to be triggered. - */ -DEFINE_SPINLOCK(clocks_lock); - -/* Global watchdog clock used by arch_wtd_reset() callback */ -struct clk *s3c2410_wdtclk; -static int __init s3c_wdt_reset_init(void) -{ - s3c2410_wdtclk = clk_get(NULL, "watchdog"); - if (IS_ERR(s3c2410_wdtclk)) - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); - return 0; -} -arch_initcall(s3c_wdt_reset_init); - -/* enable and disable calls for use with the clk struct */ - -static int clk_null_enable(struct clk *clk, int enable) -{ - return 0; -} - -int clk_enable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return -EINVAL; - - clk_enable(clk->parent); - - spin_lock_irqsave(&clocks_lock, flags); - - if ((clk->usage++) == 0) - (clk->enable)(clk, 1); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -void clk_disable(struct clk *clk) -{ - unsigned long flags; - - if (IS_ERR(clk) || clk == NULL) - return; - - spin_lock_irqsave(&clocks_lock, flags); - - if ((--clk->usage) == 0) - (clk->enable)(clk, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - clk_disable(clk->parent); -} - - -unsigned long clk_get_rate(struct clk *clk) -{ - if (IS_ERR_OR_NULL(clk)) - return 0; - - if (clk->rate != 0) - return clk->rate; - - if (clk->ops != NULL && clk->ops->get_rate != NULL) - return (clk->ops->get_rate)(clk); - - if (clk->parent != NULL) - return clk_get_rate(clk->parent); - - return clk->rate; -} - -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (!IS_ERR_OR_NULL(clk) && clk->ops && clk->ops->round_rate) - return (clk->ops->round_rate)(clk, rate); - - return rate; -} - -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned long flags; - int ret; - - if (IS_ERR_OR_NULL(clk)) - return -EINVAL; - - /* We do not default just do a clk->rate = rate as - * the clock may have been made this way by choice. - */ - - WARN_ON(clk->ops == NULL); - WARN_ON(clk->ops && clk->ops->set_rate == NULL); - - if (clk->ops == NULL || clk->ops->set_rate == NULL) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - ret = (clk->ops->set_rate)(clk, rate); - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -struct clk *clk_get_parent(struct clk *clk) -{ - return clk->parent; -} - -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - int ret = 0; - - if (IS_ERR_OR_NULL(clk) || IS_ERR_OR_NULL(parent)) - return -EINVAL; - - spin_lock_irqsave(&clocks_lock, flags); - - if (clk->ops && clk->ops->set_parent) - ret = (clk->ops->set_parent)(clk, parent); - - spin_unlock_irqrestore(&clocks_lock, flags); - - return ret; -} - -EXPORT_SYMBOL(clk_enable); -EXPORT_SYMBOL(clk_disable); -EXPORT_SYMBOL(clk_get_rate); -EXPORT_SYMBOL(clk_round_rate); -EXPORT_SYMBOL(clk_set_rate); -EXPORT_SYMBOL(clk_get_parent); -EXPORT_SYMBOL(clk_set_parent); - -/* base clocks */ - -int clk_default_setrate(struct clk *clk, unsigned long rate) -{ - clk->rate = rate; - return 0; -} - -struct clk_ops clk_ops_def_setrate = { - .set_rate = clk_default_setrate, -}; - -struct clk clk_xtal = { - .name = "xtal", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_ext = { - .name = "ext", -}; - -struct clk clk_epll = { - .name = "epll", -}; - -struct clk clk_mpll = { - .name = "mpll", - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_upll = { - .name = "upll", - .parent = NULL, - .ctrlbit = 0, -}; - -struct clk clk_f = { - .name = "fclk", - .rate = 0, - .parent = &clk_mpll, - .ctrlbit = 0, -}; - -struct clk clk_h = { - .name = "hclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_p = { - .name = "pclk", - .rate = 0, - .parent = NULL, - .ctrlbit = 0, - .ops = &clk_ops_def_setrate, -}; - -struct clk clk_usb_bus = { - .name = "usb-bus", - .rate = 0, - .parent = &clk_upll, -}; - - -struct clk s3c24xx_uclk = { - .name = "uclk", -}; - -/* initialise the clock system */ - -/** - * s3c24xx_register_clock() - register a clock - * @clk: The clock to register - * - * Add the specified clock to the list of clocks known by the system. - */ -int s3c24xx_register_clock(struct clk *clk) -{ - if (clk->enable == NULL) - clk->enable = clk_null_enable; - - /* fill up the clk_lookup structure and register it*/ - clk->lookup.dev_id = clk->devname; - clk->lookup.con_id = clk->name; - clk->lookup.clk = clk; - clkdev_add(&clk->lookup); - - return 0; -} - -/** - * s3c24xx_register_clocks() - register an array of clock pointers - * @clks: Pointer to an array of struct clk pointers - * @nr_clks: The number of clocks in the @clks array. - * - * Call s3c24xx_register_clock() for all the clock pointers contained - * in the @clks list. Returns the number of failures. - */ -int s3c24xx_register_clocks(struct clk **clks, int nr_clks) -{ - int fails = 0; - - for (; nr_clks > 0; nr_clks--, clks++) { - if (s3c24xx_register_clock(*clks) < 0) { - struct clk *clk = *clks; - printk(KERN_ERR "%s: failed to register %p: %s\n", - __func__, clk, clk->name); - fails++; - } - } - - return fails; -} - -/** - * s3c_register_clocks() - register an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * Call s3c24xx_register_clock() on the @clkp array given, printing an - * error if it fails to register the clock (unlikely). - */ -void __init s3c_register_clocks(struct clk *clkp, int nr_clks) -{ - int ret; - - for (; nr_clks > 0; nr_clks--, clkp++) { - ret = s3c24xx_register_clock(clkp); - - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - } -} - -/** - * s3c_disable_clocks() - disable an array of clocks - * @clkp: Pointer to the first clock in the array. - * @nr_clks: Number of clocks to register. - * - * for internal use only at initialisation time. disable the clocks in the - * @clkp array. - */ - -void __init s3c_disable_clocks(struct clk *clkp, int nr_clks) -{ - for (; nr_clks > 0; nr_clks--, clkp++) - (clkp->enable)(clkp, 0); -} - -/* initialise all the clocks */ - -int __init s3c24xx_register_baseclocks(unsigned long xtal) -{ - printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n"); - - clk_xtal.rate = xtal; - - /* register our clocks */ - - if (s3c24xx_register_clock(&clk_xtal) < 0) - printk(KERN_ERR "failed to register master xtal\n"); - - if (s3c24xx_register_clock(&clk_mpll) < 0) - printk(KERN_ERR "failed to register mpll clock\n"); - - if (s3c24xx_register_clock(&clk_upll) < 0) - printk(KERN_ERR "failed to register upll clock\n"); - - if (s3c24xx_register_clock(&clk_f) < 0) - printk(KERN_ERR "failed to register cpu fclk\n"); - - if (s3c24xx_register_clock(&clk_h) < 0) - printk(KERN_ERR "failed to register cpu hclk\n"); - - if (s3c24xx_register_clock(&clk_p) < 0) - printk(KERN_ERR "failed to register cpu pclk\n"); - - return 0; -} - -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) -/* debugfs support to trace clock tree hierarchy and attributes */ - -static struct dentry *clk_debugfs_root; - -static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level) -{ - struct clk *child; - const char *state; - char buf[255] = { 0 }; - int n = 0; - - if (c->name) - n = snprintf(buf, sizeof(buf) - 1, "%s", c->name); - - if (c->devname) - n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname); - - state = (c->usage > 0) ? "on" : "off"; - - seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n", - level * 3 + 1, "", - 50 - level * 3, buf, - state, c->usage, clk_get_rate(c)); - - list_for_each_entry(child, &clocks, list) { - if (child->parent != c) - continue; - - clock_tree_show_one(s, child, level + 1); - } -} - -static int clock_tree_show(struct seq_file *s, void *data) -{ - struct clk *c; - unsigned long flags; - - seq_printf(s, " clock state ref rate\n"); - seq_printf(s, "----------------------------------------------------\n"); - - spin_lock_irqsave(&clocks_lock, flags); - - list_for_each_entry(c, &clocks, list) - if (c->parent == NULL) - clock_tree_show_one(s, c, 0); - - spin_unlock_irqrestore(&clocks_lock, flags); - return 0; -} - -static int clock_tree_open(struct inode *inode, struct file *file) -{ - return single_open(file, clock_tree_show, inode->i_private); < |