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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-16 12:45:55 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-11-16 12:45:55 -0800 |
commit | 71f777ed50e9109c235c14604d5e23d2f8e7453c (patch) | |
tree | 89d68da346c1f0e4de4429af2be36a8a39566064 /arch/arm/mach-imx/system.c | |
parent | dd3190ee8142d94c9aa09d278a106544b2e5e7d1 (diff) | |
parent | 6886059f2ef5d62c73e87a905e84fa4f87d56074 (diff) |
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A first set of batches of fixes for 3.13. The diffstat is large
mostly because we're adding a defconfig for a family that's been
lacking it, and there's some missing clock information added for i.MX
and OMAP.
The at91 new code is around dealing with RTC/RTT reset at boot to fix
possible hangs due to pending wakeup interrupts coming in during early
boot"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: OMAP2+: Fix build for dra7xx without omap4 and 5
ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume
doc: devicetree: Add bindings documentation for omap-des driver
ARM: dts: doc: Document missing compatible property for omap-sham driver
ARM: OMAP3: Beagle: fix return value check in beagle_opp_init()
ARM: at91: fix hanged boot due to early rtt-interrupt
ARM: at91: fix hanged boot due to early rtc-interrupt
video: exynos_mipi_dsim: Remove unused variable
ARM: highbank: only select errata 764369 if SMP
ARM: sti: only select errata 764369 if SMP
ARM: tegra: init fuse before setting reset handler
ARM: vt8500: add defconfig for v6/v7 chips
ARM: integrator_cp: Set LCD{0,1} enable lines when turning on CLCD
ARM: OMAP: devicetree: fix SPI node compatible property syntax items
pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed
ARM: OMAP2+: smsc911x: fix return value check in gpmc_smsc911x_init()
MAINTAINERS: drop discontinued mailing list
ARM: dts: i.MX51: Fix OTG PHY clock
ARM: imx: set up pllv3 POWER and BYPASS sequentially
ARM: imx: pllv3 needs relock in .set_rate() call
...
Diffstat (limited to 'arch/arm/mach-imx/system.c')
-rw-r--r-- | arch/arm/mach-imx/system.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index e6edcd38b282..5e3027d3692f 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -42,9 +42,6 @@ void mxc_restart(enum reboot_mode mode, const char *cmd) { unsigned int wcr_enable; - if (cpu_is_imx6q() || cpu_is_imx6dl()) - imx_src_prepare_restart(); - if (wdog_clk) clk_enable(wdog_clk); @@ -55,7 +52,14 @@ void mxc_restart(enum reboot_mode mode, const char *cmd) /* Assert SRS signal */ __raw_writew(wcr_enable, wdog_base); - /* write twice to ensure the request will not get ignored */ + /* + * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be + * written twice), we add another two writes to ensure there must be at + * least two writes happen in the same one 32kHz clock period. We save + * the target check here, since the writes shouldn't be a huge burden + * for other platforms. + */ + __raw_writew(wcr_enable, wdog_base); __raw_writew(wcr_enable, wdog_base); /* wait for reset to assert... */ |