diff options
| author | A.s. Dong <aisheng.dong@nxp.com> | 2018-11-10 15:13:04 +0000 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-12-10 08:56:30 +0800 |
| commit | de70d0e9d43dd5fa899ce3a1560a4d2536b6b71e (patch) | |
| tree | 66e4aa2cd3ecc2a6f195eb383900f94639e1b0bb /arch/arm/mach-imx/mxc.h | |
| parent | 7c41ea57beb2aee96fa63091a457b1a2826f3c42 (diff) | |
ARM: imx: add initial support for imx7ulp
The i.MX 7ULP family of processors features NXP's advanced implementation
of the Arm Cortex-A7 core, the Arm Cortex-M4 core, as well as a 3D and 2D
Graphics Processing Units (GPUs).
This patch aims to add an initial support for imx7ulp. Note that we need
configure power mode to Partial Stop mode 3 with system/bus clock enabled
first as the default enabled STOP mode will gate off system/bus clock when
execute WFI in MX7ULP SoC.
And there's still no MXC_CPU_IMX7ULP IDs read from register as ULP has no
anatop as before. So we encode one with 0xff in reverse order in case new
ones will be in the future.
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx/mxc.h')
| -rw-r--r-- | arch/arm/mach-imx/mxc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index b130a53ff62a..8e72d4e080af 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -44,6 +44,7 @@ #define MXC_CPU_IMX6ULZ 0x6b #define MXC_CPU_IMX6SLL 0x67 #define MXC_CPU_IMX7D 0x72 +#define MXC_CPU_IMX7ULP 0xff #define IMX_DDR_TYPE_LPDDR2 1 |