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authorCyrille Pitchen <cyrille.pitchen@microchip.com>2018-12-06 14:43:39 +0000
committerBoris Brezillon <boris.brezillon@bootlin.com>2018-12-10 21:59:08 +0100
commit816873eaeec63ba2e58bbd514d15a7efc6e572f7 (patch)
tree748346eb31ddb0c1ba897c56ed2a3b7dec2ce76a /Documentation
parentd05e21e3cfc7f2d4d152c7f8b0738cacdc913cb5 (diff)
mtd: spi-nor: parse SFDP 4-byte Address Instruction Table
Add support for SFDP (JESD216B) 4-byte Address Instruction Table. This table is optional but when available, we parse it to get the 4-byte address op codes supported by the memory. Using these op codes is stateless as opposed to entering the 4-byte address mode or setting the Base Address Register (BAR). Flashes that have the 4BAIT table declared can now support SPINOR_OP_PP_1_1_4_4B and SPINOR_OP_PP_1_4_4_4B opcodes. Tested on MX25L25673G. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com> [tudor.ambarus@microchip.com: - rework erase and page program logic, - pass DMA-able buffer to spi_nor_read_sfdp(), - introduce SPI_NOR_HAS_4BAIT - various minor updates.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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