diff options
| author | Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> | 2020-05-05 21:06:15 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-05-05 15:08:01 +0100 |
| commit | 3812a081d2fcc297d039c4ffafa7778d75abcbe2 (patch) | |
| tree | f148f30c202df5b259c057a116730fc62d376c5a /Documentation/devicetree/bindings/spi | |
| parent | f42377916ed534649341777669628f22ef1edf59 (diff) | |
spi: dw-apb-ssi: Add compatible string for DesignWare DWC_ssi
This patch adds compatible string "snps,dwc-ssi-1.01a" to the above DT
binding document, to provide support for DesignWare DWC_ssi IP [1].
Current driver supports DW_apb_ssi IP [2].
References:
[1] https://www.synopsys.com/dw/ipdir.php?c=dwc_ssi
[2] https://www.synopsys.com/dw/ipdir.php?c=DW_apb_ssi
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Link: https://lore.kernel.org/r/20200505130618.554-5-wan.ahmad.zainie.wan.mohamad@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/spi')
| -rw-r--r-- | Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt index 3ed08ee9feba..2ead46b633ea 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt @@ -2,7 +2,7 @@ Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. Required properties: - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or - "jaguar2", or "amazon,alpine-dw-apb-ssi" + "jaguar2", or "amazon,alpine-dw-apb-ssi", or "snps,dwc-ssi-1.01a" - reg : The register base for the controller. For "mscc,<soc>-spi", a second register set is required (named ICPU_CFG:SPI_MST) - interrupts : One interrupt, used by the controller. |