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authorThomas Gleixner <tglx@linutronix.de>2018-03-14 20:37:31 +0100
committerThomas Gleixner <tglx@linutronix.de>2018-03-14 20:37:31 +0100
commitb0d8bef8ed805ca92eb91e86acf3ce89cbebc8ce (patch)
tree8838391a76f0cf75ffcd31166996d03d19c580a6 /Documentation/atomic_bitops.txt
parent82b691bedf05f258f1c86c96ee574b0d7795c0a1 (diff)
parentfc6eabbbf8ef99efed778dd5afabc83c21dba585 (diff)
Merge branch 'linus' into irq/core to pick up dependencies.
Diffstat (limited to 'Documentation/atomic_bitops.txt')
-rw-r--r--Documentation/atomic_bitops.txt7
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/atomic_bitops.txt b/Documentation/atomic_bitops.txt
index 5550bfdcce5f..be70b32c95d9 100644
--- a/Documentation/atomic_bitops.txt
+++ b/Documentation/atomic_bitops.txt
@@ -58,7 +58,12 @@ Like with atomic_t, the rule of thumb is:
- RMW operations that have a return value are fully ordered.
-Except for test_and_set_bit_lock() which has ACQUIRE semantics and
+ - RMW operations that are conditional are unordered on FAILURE,
+ otherwise the above rules apply. In the case of test_and_{}_bit() operations,
+ if the bit in memory is unchanged by the operation then it is deemed to have
+ failed.
+
+Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics and
clear_bit_unlock() which has RELEASE semantics.
Since a platform only has a single means of achieving atomic operations