can: mcp251xfd: rename all remaining occurrence to mcp251xfd

In [1] Geert noted that the autodetect compatible for the mcp25xxfd driver,
which is "microchip,mcp25xxfd" might be too generic and overlap with upcoming,
but incompatible chips.

In the previous patch the autodetect DT compatbile has been renamed to
"microchip,mcp251xfd", this patch changes all non user facing occurrence of
"mcp25xxfd" to "mcp251xfd" and "MCP25XXFD" to "MCP251XFD".

[1] http://lore.kernel.org/r/CAMuHMdVkwGjr6dJuMyhQNqFoJqbh6Ec5V2b5LenCshwpM2SDsQ@mail.gmail.com

Link: https://lore.kernel.org/r/20200930091424.792165-10-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

4 files changed, 1277 insertions, 1277 deletions

diff --git a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
index 37d3f07c9bf6..c3f49543ff26 100644
--- a/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
+++ b/drivers/net/can/spi/mcp251xfd/mcp251xfd-core.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 //
-// mcp25xxfd - Microchip MCP25xxFD Family CAN controller driver
+// mcp251xfd - Microchip MCP251xFD Family CAN controller driver
 //
 // Copyright (c) 2019, 2020 Pengutronix,
 //                          Marc Kleine-Budde <kernel@pengutronix.de>
@@ -27,27 +27,27 @@
 
 #define DEVICE_NAME "mcp251xfd"
 
-static const struct mcp25xxfd_devtype_data mcp25xxfd_devtype_data_mcp2517fd = {
-	.quirks = MCP25XXFD_QUIRK_MAB_NO_WARN | MCP25XXFD_QUIRK_CRC_REG |
-		MCP25XXFD_QUIRK_CRC_RX | MCP25XXFD_QUIRK_CRC_TX |
-		MCP25XXFD_QUIRK_ECC,
-	.model = MCP25XXFD_MODEL_MCP2517FD,
+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp2517fd = {
+	.quirks = MCP251XFD_QUIRK_MAB_NO_WARN | MCP251XFD_QUIRK_CRC_REG |
+		MCP251XFD_QUIRK_CRC_RX | MCP251XFD_QUIRK_CRC_TX |
+		MCP251XFD_QUIRK_ECC,
+	.model = MCP251XFD_MODEL_MCP2517FD,
 };
 
-static const struct mcp25xxfd_devtype_data mcp25xxfd_devtype_data_mcp2518fd = {
-	.quirks = MCP25XXFD_QUIRK_CRC_REG | MCP25XXFD_QUIRK_CRC_RX |
-		MCP25XXFD_QUIRK_CRC_TX | MCP25XXFD_QUIRK_ECC,
-	.model = MCP25XXFD_MODEL_MCP2518FD,
+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp2518fd = {
+	.quirks = MCP251XFD_QUIRK_CRC_REG | MCP251XFD_QUIRK_CRC_RX |
+		MCP251XFD_QUIRK_CRC_TX | MCP251XFD_QUIRK_ECC,
+	.model = MCP251XFD_MODEL_MCP2518FD,
 };
 
 /* Autodetect model, start with CRC enabled. */
-static const struct mcp25xxfd_devtype_data mcp25xxfd_devtype_data_mcp251xfd = {
-	.quirks = MCP25XXFD_QUIRK_CRC_REG | MCP25XXFD_QUIRK_CRC_RX |
-		MCP25XXFD_QUIRK_CRC_TX | MCP25XXFD_QUIRK_ECC,
-	.model = MCP25XXFD_MODEL_MCP251XFD,
+static const struct mcp251xfd_devtype_data mcp251xfd_devtype_data_mcp251xfd = {
+	.quirks = MCP251XFD_QUIRK_CRC_REG | MCP251XFD_QUIRK_CRC_RX |
+		MCP251XFD_QUIRK_CRC_TX | MCP251XFD_QUIRK_ECC,
+	.model = MCP251XFD_MODEL_MCP251XFD,
 };
 
-static const struct can_bittiming_const mcp25xxfd_bittiming_const = {
+static const struct can_bittiming_const mcp251xfd_bittiming_const = {
 	.name = DEVICE_NAME,
 	.tseg1_min = 2,
 	.tseg1_max = 256,
@@ -59,7 +59,7 @@ static const struct can_bittiming_const mcp25xxfd_bittiming_const = {
 	.brp_inc = 1,
 };
 
-static const struct can_bittiming_const mcp25xxfd_data_bittiming_const = {
+static const struct can_bittiming_const mcp251xfd_data_bittiming_const = {
 	.name = DEVICE_NAME,
 	.tseg1_min = 1,
 	.tseg1_max = 32,
@@ -71,14 +71,14 @@ static const struct can_bittiming_const mcp25xxfd_data_bittiming_const = {
 	.brp_inc = 1,
 };
 
-static const char *__mcp25xxfd_get_model_str(enum mcp25xxfd_model model)
+static const char *__mcp251xfd_get_model_str(enum mcp251xfd_model model)
 {
 	switch (model) {
-	case MCP25XXFD_MODEL_MCP2517FD:
+	case MCP251XFD_MODEL_MCP2517FD:
 		return "MCP2517FD"; break;
-	case MCP25XXFD_MODEL_MCP2518FD:
+	case MCP251XFD_MODEL_MCP2518FD:
 		return "MCP2518FD"; break;
-	case MCP25XXFD_MODEL_MCP251XFD:
+	case MCP251XFD_MODEL_MCP251XFD:
 		return "MCP251xFD"; break;
 	}
 
@@ -86,36 +86,36 @@ static const char *__mcp25xxfd_get_model_str(enum mcp25xxfd_model model)
 }
 
 static inline const char *
-mcp25xxfd_get_model_str(const struct mcp25xxfd_priv *priv)
+mcp251xfd_get_model_str(const struct mcp251xfd_priv *priv)
 {
-	return __mcp25xxfd_get_model_str(priv->devtype_data.model);
+	return __mcp251xfd_get_model_str(priv->devtype_data.model);
 }
 
-static const char *mcp25xxfd_get_mode_str(const u8 mode)
+static const char *mcp251xfd_get_mode_str(const u8 mode)
 {
 	switch (mode) {
-	case MCP25XXFD_REG_CON_MODE_MIXED:
+	case MCP251XFD_REG_CON_MODE_MIXED:
 		return "Mixed (CAN FD/CAN 2.0)"; break;
-	case MCP25XXFD_REG_CON_MODE_SLEEP:
+	case MCP251XFD_REG_CON_MODE_SLEEP:
 		return "Sleep"; break;
-	case MCP25XXFD_REG_CON_MODE_INT_LOOPBACK:
+	case MCP251XFD_REG_CON_MODE_INT_LOOPBACK:
 		return "Internal Loopback"; break;
-	case MCP25XXFD_REG_CON_MODE_LISTENONLY:
+	case MCP251XFD_REG_CON_MODE_LISTENONLY:
 		return "Listen Only"; break;
-	case MCP25XXFD_REG_CON_MODE_CONFIG:
+	case MCP251XFD_REG_CON_MODE_CONFIG:
 		return "Configuration"; break;
-	case MCP25XXFD_REG_CON_MODE_EXT_LOOPBACK:
+	case MCP251XFD_REG_CON_MODE_EXT_LOOPBACK:
 		return "External Loopback"; break;
-	case MCP25XXFD_REG_CON_MODE_CAN2_0:
+	case MCP251XFD_REG_CON_MODE_CAN2_0:
 		return "CAN 2.0"; break;
-	case MCP25XXFD_REG_CON_MODE_RESTRICTED:
+	case MCP251XFD_REG_CON_MODE_RESTRICTED:
 		return "Restricted Operation"; break;
 	}
 
 	return "<unknown>";
 }
 
-static inline int mcp25xxfd_vdd_enable(const struct mcp25xxfd_priv *priv)
+static inline int mcp251xfd_vdd_enable(const struct mcp251xfd_priv *priv)
 {
 	if (!priv->reg_vdd)
 		return 0;
@@ -123,7 +123,7 @@ static inline int mcp25xxfd_vdd_enable(const struct mcp25xxfd_priv *priv)
 	return regulator_enable(priv->reg_vdd);
 }
 
-static inline int mcp25xxfd_vdd_disable(const struct mcp25xxfd_priv *priv)
+static inline int mcp251xfd_vdd_disable(const struct mcp251xfd_priv *priv)
 {
 	if (!priv->reg_vdd)
 		return 0;
@@ -132,7 +132,7 @@ static inline int mcp25xxfd_vdd_disable(const struct mcp25xxfd_priv *priv)
 }
 
 static inline int
-mcp25xxfd_transceiver_enable(const struct mcp25xxfd_priv *priv)
+mcp251xfd_transceiver_enable(const struct mcp251xfd_priv *priv)
 {
 	if (!priv->reg_xceiver)
 		return 0;
@@ -141,7 +141,7 @@ mcp25xxfd_transceiver_enable(const struct mcp25xxfd_priv *priv)
 }
 
 static inline int
-mcp25xxfd_transceiver_disable(const struct mcp25xxfd_priv *priv)
+mcp251xfd_transceiver_disable(const struct mcp251xfd_priv *priv)
 {
 	if (!priv->reg_xceiver)
 		return 0;
@@ -149,7 +149,7 @@ mcp25xxfd_transceiver_disable(const struct mcp25xxfd_priv *priv)
 	return regulator_disable(priv->reg_xceiver);
 }
 
-static int mcp25xxfd_clks_and_vdd_enable(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_clks_and_vdd_enable(const struct mcp251xfd_priv *priv)
 {
 	int err;
 
@@ -157,22 +157,22 @@ static int mcp25xxfd_clks_and_vdd_enable(const struct mcp25xxfd_priv *priv)
 	if (err)
 		return err;
 
-	err = mcp25xxfd_vdd_enable(priv);
+	err = mcp251xfd_vdd_enable(priv);
 	if (err)
 		clk_disable_unprepare(priv->clk);
 
 	/* Wait for oscillator stabilisation time after power up */
-	usleep_range(MCP25XXFD_OSC_STAB_SLEEP_US,
-		     2 * MCP25XXFD_OSC_STAB_SLEEP_US);
+	usleep_range(MCP251XFD_OSC_STAB_SLEEP_US,
+		     2 * MCP251XFD_OSC_STAB_SLEEP_US);
 
 	return err;
 }
 
-static int mcp25xxfd_clks_and_vdd_disable(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_clks_and_vdd_disable(const struct mcp251xfd_priv *priv)
 {
 	int err;
 
-	err = mcp25xxfd_vdd_disable(priv);
+	err = mcp251xfd_vdd_disable(priv);
 	if (err)
 		return err;
 
@@ -182,30 +182,30 @@ static int mcp25xxfd_clks_and_vdd_disable(const struct mcp25xxfd_priv *priv)
 }
 
 static inline u8
-mcp25xxfd_cmd_prepare_write_reg(const struct mcp25xxfd_priv *priv,
-				union mcp25xxfd_write_reg_buf *write_reg_buf,
+mcp251xfd_cmd_prepare_write_reg(const struct mcp251xfd_priv *priv,
+				union mcp251xfd_write_reg_buf *write_reg_buf,
 				const u16 reg, const u32 mask, const u32 val)
 {
 	u8 first_byte, last_byte, len;
 	u8 *data;
 	__le32 val_le32;
 
-	first_byte = mcp25xxfd_first_byte_set(mask);
-	last_byte = mcp25xxfd_last_byte_set(mask);
+	first_byte = mcp251xfd_first_byte_set(mask);
+	last_byte = mcp251xfd_last_byte_set(mask);
 	len = last_byte - first_byte + 1;
 
-	data = mcp25xxfd_spi_cmd_write(priv, write_reg_buf, reg + first_byte);
+	data = mcp251xfd_spi_cmd_write(priv, write_reg_buf, reg + first_byte);
 	val_le32 = cpu_to_le32(val >> BITS_PER_BYTE * first_byte);
 	memcpy(data, &val_le32, len);
 
-	if (priv->devtype_data.quirks & MCP25XXFD_QUIRK_CRC_REG) {
+	if (priv->devtype_data.quirks & MCP251XFD_QUIRK_CRC_REG) {
 		u16 crc;
 
-		mcp25xxfd_spi_cmd_crc_set_len_in_reg(&write_reg_buf->crc.cmd,
+		mcp251xfd_spi_cmd_crc_set_len_in_reg(&write_reg_buf->crc.cmd,
 						     len);
 		/* CRC */
 		len += sizeof(write_reg_buf->crc.cmd);
-		crc = mcp25xxfd_crc16_compute(&write_reg_buf->crc, len);
+		crc = mcp251xfd_crc16_compute(&write_reg_buf->crc, len);
 		put_unaligned_be16(crc, (void *)write_reg_buf + len);
 
 		/* Total length */
@@ -218,80 +218,80 @@ mcp25xxfd_cmd_prepare_write_reg(const struct mcp25xxfd_priv *priv,
 }
 
 static inline int
-mcp25xxfd_tef_tail_get_from_chip(const struct mcp25xxfd_priv *priv,
+mcp251xfd_tef_tail_get_from_chip(const struct mcp251xfd_priv *priv,
 				 u8 *tef_tail)
 {
 	u32 tef_ua;
 	int err;
 
-	err = regmap_read(priv->map_reg, MCP25XXFD_REG_TEFUA, &tef_ua);
+	err = regmap_read(priv->map_reg, MCP251XFD_REG_TEFUA, &tef_ua);
 	if (err)
 		return err;
 
-	*tef_tail = tef_ua / sizeof(struct mcp25xxfd_hw_tef_obj);
+	*tef_tail = tef_ua / sizeof(struct mcp251xfd_hw_tef_obj);
 
 	return 0;
 }
 
 static inline int
-mcp25xxfd_tx_tail_get_from_chip(const struct mcp25xxfd_priv *priv,
+mcp251xfd_tx_tail_get_from_chip(const struct mcp251xfd_priv *priv,
 				u8 *tx_tail)
 {
 	u32 fifo_sta;
 	int err;
 
 	err = regmap_read(priv->map_reg,
-			  MCP25XXFD_REG_FIFOSTA(MCP25XXFD_TX_FIFO),
+			  MCP251XFD_REG_FIFOSTA(MCP251XFD_TX_FIFO),
 			  &fifo_sta);
 	if (err)
 		return err;
 
-	*tx_tail = FIELD_GET(MCP25XXFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);
+	*tx_tail = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);
 
 	return 0;
 }
 
 static inline int
-mcp25xxfd_rx_head_get_from_chip(const struct mcp25xxfd_priv *priv,
-				const struct mcp25xxfd_rx_ring *ring,
+mcp251xfd_rx_head_get_from_chip(const struct mcp251xfd_priv *priv,
+				const struct mcp251xfd_rx_ring *ring,
 				u8 *rx_head)
 {
 	u32 fifo_sta;
 	int err;
 
-	err = regmap_read(priv->map_reg, MCP25XXFD_REG_FIFOSTA(ring->fifo_nr),
+	err = regmap_read(priv->map_reg, MCP251XFD_REG_FIFOSTA(ring->fifo_nr),
 			  &fifo_sta);
 	if (err)
 		return err;
 
-	*rx_head = FIELD_GET(MCP25XXFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);
+	*rx_head = FIELD_GET(MCP251XFD_REG_FIFOSTA_FIFOCI_MASK, fifo_sta);
 
 	return 0;
 }
 
 static inline int
-mcp25xxfd_rx_tail_get_from_chip(const struct mcp25xxfd_priv *priv,
-				const struct mcp25xxfd_rx_ring *ring,
+mcp251xfd_rx_tail_get_from_chip(const struct mcp251xfd_priv *priv,
+				const struct mcp251xfd_rx_ring *ring,
 				u8 *rx_tail)
 {
 	u32 fifo_ua;
 	int err;
 
-	err = regmap_read(priv->map_reg, MCP25XXFD_REG_FIFOUA(ring->fifo_nr),
+	err = regmap_read(priv->map_reg, MCP251XFD_REG_FIFOUA(ring->fifo_nr),
 			  &fifo_ua);
 	if (err)
 		return err;
 
-	fifo_ua -= ring->base - MCP25XXFD_RAM_START;
+	fifo_ua -= ring->base - MCP251XFD_RAM_START;
 	*rx_tail = fifo_ua / ring->obj_size;
 
 	return 0;
 }
 
 static void
-mcp25xxfd_tx_ring_init_tx_obj(const struct mcp25xxfd_priv *priv,
-			      const struct mcp25xxfd_tx_ring *ring,
-			      struct mcp25xxfd_tx_obj *tx_obj,
+mcp251xfd_tx_ring_init_tx_obj(const struct mcp251xfd_priv *priv,
+			      const struct mcp251xfd_tx_ring *ring,
+			      struct mcp251xfd_tx_obj *tx_obj,
 			      const u8 rts_buf_len,
 			      const u8 n)
 {
@@ -299,12 +299,12 @@ mcp25xxfd_tx_ring_init_tx_obj(const struct mcp25xxfd_priv *priv,
 	u16 addr;
 
 	/* FIFO load */
-	addr = mcp25xxfd_get_tx_obj_addr(ring, n);
-	if (priv->devtype_data.quirks & MCP25XXFD_QUIRK_CRC_TX)
-		mcp25xxfd_spi_cmd_write_crc_set_addr(&tx_obj->buf.crc.cmd,
+	addr = mcp251xfd_get_tx_obj_addr(ring, n);
+	if (priv->devtype_data.quirks & MCP251XFD_QUIRK_CRC_TX)
+		mcp251xfd_spi_cmd_write_crc_set_addr(&tx_obj->buf.crc.cmd,
 						     addr);
 	else
-		mcp25xxfd_spi_cmd_write_nocrc(&tx_obj->buf.nocrc.cmd,
+		mcp251xfd_spi_cmd_write_nocrc(&tx_obj->buf.nocrc.cmd,
 					      addr);
 
 	xfer = &tx_obj->xfer[0];
@@ -324,11 +324,11 @@ mcp25xxfd_tx_ring_init_tx_obj(const struct mcp25xxfd_priv *priv,
 					ARRAY_SIZE(tx_obj->xfer));
 }
 
-static void mcp25xxfd_ring_init(struct mcp25xxfd_priv *priv)
+static void mcp251xfd_ring_init(struct mcp251xfd_priv *priv)
 {
-	struct mcp25xxfd_tx_ring *tx_ring;
-	struct mcp25xxfd_rx_ring *rx_ring, *prev_rx_ring = NULL;
-	struct mcp25xxfd_tx_obj *tx_obj;
+	struct mcp251xfd_tx_ring *tx_ring;
+	struct mcp251xfd_rx_ring *rx_ring, *prev_rx_ring = NULL;
+	struct mcp251xfd_tx_obj *tx_obj;
 	u32 val;
 	u16 addr;
 	u8 len;
@@ -342,27 +342,27 @@ static void mcp25xxfd_ring_init(struct mcp25xxfd_priv *priv)
 	tx_ring = priv->tx;
 	tx_ring->head = 0;
 	tx_ring->tail = 0;
-	tx_ring->base = mcp25xxfd_get_tef_obj_addr(tx_ring->obj_num);
+	tx_ring->base = mcp251xfd_get_tef_obj_addr(tx_ring->obj_num);
 
 	/* FIFO request to send */
-	addr = MCP25XXFD_REG_FIFOCON(MCP25XXFD_TX_FIFO);
-	val = MCP25XXFD_REG_FIFOCON_TXREQ | MCP25XXFD_REG_FIFOCON_UINC;
-	len = mcp25xxfd_cmd_prepare_write_reg(priv, &tx_ring->rts_buf,
+	addr = MCP251XFD_REG_FIFOCON(MCP251XFD_TX_FIFO);
+	val = MCP251XFD_REG_FIFOCON_TXREQ | MCP251XFD_REG_FIFOCON_UINC;
+	len = mcp251xfd_cmd_prepare_write_reg(priv, &tx_ring->rts_buf,
 					      addr, val, val);
 
-	mcp25xxfd_for_each_tx_obj(tx_ring, tx_obj, i)
-		mcp25xxfd_tx_ring_init_tx_obj(priv, tx_ring, tx_obj, len, i);
+	mcp251xfd_for_each_tx_obj(tx_ring, tx_obj, i)
+		mcp251xfd_tx_ring_init_tx_obj(priv, tx_ring, tx_obj, len, i);
 
 	/* RX */
-	mcp25xxfd_for_each_rx_ring(priv, rx_ring, i) {
+	mcp251xfd_for_each_rx_ring(priv, rx_ring, i) {
 		rx_ring->head = 0;
 		rx_ring->tail = 0;
 		rx_ring->nr = i;
-		rx_ring->fifo_nr = MCP25XXFD_RX_FIFO(i);
+		rx_ring->fifo_nr = MCP251XFD_RX_FIFO(i);
 
 		if (!prev_rx_ring)
 			rx_ring->base =
-				mcp25xxfd_get_tx_obj_addr(tx_ring,
+				mcp251xfd_get_tx_obj_addr(tx_ring,
 							  tx_ring->obj_num);
 		else
 			rx_ring->base = prev_rx_ring->base +
@@ -373,7 +373,7 @@ static void mcp25xxfd_ring_init(struct mcp25xxfd_priv *priv)
 	}
 }
 
-static void mcp25xxfd_ring_free(struct mcp25xxfd_priv *priv)
+static void mcp251xfd_ring_free(struct mcp251xfd_priv *priv)
 {
 	int i;
 
@@ -383,31 +383,31 @@ static void mcp25xxfd_ring_free(struct mcp25xxfd_priv *priv)
 	}
 }
 
-static int mcp25xxfd_ring_alloc(struct mcp25xxfd_priv *priv)
+static int mcp251xfd_ring_alloc(struct mcp251xfd_priv *priv)
 {
-	struct mcp25xxfd_tx_ring *tx_ring;
-	struct mcp25xxfd_rx_ring *rx_ring;
+	struct mcp251xfd_tx_ring *tx_ring;
+	struct mcp251xfd_rx_ring *rx_ring;
 	int tef_obj_size, tx_obj_size, rx_obj_size;
 	int tx_obj_num;
 	int ram_free, i;
 
-	tef_obj_size = sizeof(struct mcp25xxfd_hw_tef_obj);
+	tef_obj_size = sizeof(struct mcp251xfd_hw_tef_obj);
 	/* listen-only mode works like FD mode */
 	if (priv->can.ctrlmode & (CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_FD)) {
-		tx_obj_num = MCP25XXFD_TX_OBJ_NUM_CANFD;
-		tx_obj_size = sizeof(struct mcp25xxfd_hw_tx_obj_canfd);
-		rx_obj_size = sizeof(struct mcp25xxfd_hw_rx_obj_canfd);
+		tx_obj_num = MCP251XFD_TX_OBJ_NUM_CANFD;
+		tx_obj_size = sizeof(struct mcp251xfd_hw_tx_obj_canfd);
+		rx_obj_size = sizeof(struct mcp251xfd_hw_rx_obj_canfd);
 	} else {
-		tx_obj_num = MCP25XXFD_TX_OBJ_NUM_CAN;
-		tx_obj_size = sizeof(struct mcp25xxfd_hw_tx_obj_can);
-		rx_obj_size = sizeof(struct mcp25xxfd_hw_rx_obj_can);
+		tx_obj_num = MCP251XFD_TX_OBJ_NUM_CAN;
+		tx_obj_size = sizeof(struct mcp251xfd_hw_tx_obj_can);
+		rx_obj_size = sizeof(struct mcp251xfd_hw_rx_obj_can);
 	}
 
 	tx_ring = priv->tx;
 	tx_ring->obj_num = tx_obj_num;
 	tx_ring->obj_size = tx_obj_size;
 
-	ram_free = MCP25XXFD_RAM_SIZE - tx_obj_num *
+	ram_free = MCP251XFD_RAM_SIZE - tx_obj_num *
 		(tef_obj_size + tx_obj_size);
 
 	for (i = 0;
@@ -421,7 +421,7 @@ static int mcp25xxfd_ring_alloc(struct mcp25xxfd_priv *priv)
 		rx_ring = kzalloc(sizeof(*rx_ring) + rx_obj_size * rx_obj_num,
 				  GFP_KERNEL);
 		if (!rx_ring) {
-			mcp25xxfd_ring_free(priv);
+			mcp251xfd_ring_free(priv);
 			return -ENOMEM;
 		}
 		rx_ring->obj_num = rx_obj_num;
@@ -437,7 +437,7 @@ static int mcp25xxfd_ring_alloc(struct mcp25xxfd_priv *priv)
 		   tx_obj_num, tef_obj_size, tef_obj_size * tx_obj_num,
 		   tx_obj_num, tx_obj_size, tx_obj_size * tx_obj_num);
 
-	mcp25xxfd_for_each_rx_ring(priv, rx_ring, i) {
+	mcp251xfd_for_each_rx_ring(priv, rx_ring, i) {
 		netdev_dbg(priv->ndev,
 			   "FIFO setup: RX-%d: %d*%d bytes = %d bytes\n",
 			   i, rx_ring->obj_num, rx_ring->obj_size,
@@ -452,48 +452,48 @@ static int mcp25xxfd_ring_alloc(struct mcp25xxfd_priv *priv)
 }
 
 static inline int
-mcp25xxfd_chip_get_mode(const struct mcp25xxfd_priv *priv, u8 *mode)
+mcp251xfd_chip_get_mode(const struct mcp251xfd_priv *priv, u8 *mode)
 {
 	u32 val;
 	int err;
 
-	err = regmap_read(priv->map_reg, MCP25XXFD_REG_CON, &val);
+	err = regmap_read(priv->map_reg, MCP251XFD_REG_CON, &val);
 	if (err)
 		return err;
 
-	*mode = FIELD_GET(MCP25XXFD_REG_CON_OPMOD_MASK, val);
+	*mode = FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK, val);
 
 	return 0;
 }
 
 static int
-__mcp25xxfd_chip_set_mode(const struct mcp25xxfd_priv *priv,
+__mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
 			  const u8 mode_req, bool nowait)
 {
 	u32 con, con_reqop;
 	int err;
 
-	con_reqop = FIELD_PREP(MCP25XXFD_REG_CON_REQOP_MASK, mode_req);
-	err = regmap_update_bits(priv->map_reg, MCP25XXFD_REG_CON,
-				 MCP25XXFD_REG_CON_REQOP_MASK, con_reqop);
+	con_reqop = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK, mode_req);
+	err = regmap_update_bits(priv->map_reg, MCP251XFD_REG_CON,
+				 MCP251XFD_REG_CON_REQOP_MASK, con_reqop);
 	if (err)
 		return err;
 
-	if (mode_req == MCP25XXFD_REG_CON_MODE_SLEEP || nowait)
+	if (mode_req == MCP251XFD_REG_CON_MODE_SLEEP || nowait)
 		return 0;
 
-	err = regmap_read_poll_timeout(priv->map_reg, MCP25XXFD_REG_CON, con,
-				       FIELD_GET(MCP25XXFD_REG_CON_OPMOD_MASK,
+	err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_CON, con,
+				       FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK,
 						 con) == mode_req,
-				       MCP25XXFD_POLL_SLEEP_US,
-				       MCP25XXFD_POLL_TIMEOUT_US);
+				       MCP251XFD_POLL_SLEEP_US,
+				       MCP251XFD_POLL_TIMEOUT_US);
 	if (err) {
-		u8 mode = FIELD_GET(MCP25XXFD_REG_CON_OPMOD_MASK, con);
+		u8 mode = FIELD_GET(MCP251XFD_REG_CON_OPMOD_MASK, con);
 
 		netdev_err(priv->ndev,
 			   "Controller failed to enter mode %s Mode (%u) and stays in %s Mode (%u).\n",
-			   mcp25xxfd_get_mode_str(mode_req), mode_req,
-			   mcp25xxfd_get_mode_str(mode), mode);
+			   mcp251xfd_get_mode_str(mode_req), mode_req,
+			   mcp251xfd_get_mode_str(mode), mode);
 		return err;
 	}
 
@@ -501,25 +501,25 @@ __mcp25xxfd_chip_set_mode(const struct mcp25xxfd_priv *priv,
 }
 
 static inline int
-mcp25xxfd_chip_set_mode(const struct mcp25xxfd_priv *priv,
+mcp251xfd_chip_set_mode(const struct mcp251xfd_priv *priv,
 			const u8 mode_req)
 {
-	return __mcp25xxfd_chip_set_mode(priv, mode_req, false);
+	return __mcp251xfd_chip_set_mode(priv, mode_req, false);
 }
 
 static inline int
-mcp25xxfd_chip_set_mode_nowait(const struct mcp25xxfd_priv *priv,
+mcp251xfd_chip_set_mode_nowait(const struct mcp251xfd_priv *priv,
 			       const u8 mode_req)
 {
-	return __mcp25xxfd_chip_set_mode(priv, mode_req, true);
+	return __mcp251xfd_chip_set_mode(priv, mode_req, true);
 }
 
-static inline bool mcp25xxfd_osc_invalid(u32 reg)
+static inline bool mcp251xfd_osc_invalid(u32 reg)
 {
 	return reg == 0x0 || reg == 0xffffffff;
 }
 
-static int mcp25xxfd_chip_clock_enable(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_clock_enable(const struct mcp251xfd_priv *priv)
 {
 	u32 osc, osc_reference, osc_mask;
 	int err;
@@ -527,10 +527,10 @@ static int mcp25xxfd_chip_clock_enable(const struct mcp25xxfd_priv *priv)
 	/* Set Power On Defaults for "Clock Output Divisor" and remove
 	 * "Oscillator Disable" bit.
 	 */
-	osc = FIELD_PREP(MCP25XXFD_REG_OSC_CLKODIV_MASK,
-			 MCP25XXFD_REG_OSC_CLKODIV_10);
-	osc_reference = MCP25XXFD_REG_OSC_OSCRDY;
-	osc_mask = MCP25XXFD_REG_OSC_OSCRDY | MCP25XXFD_REG_OSC_PLLRDY;
+	osc = FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,
+			 MCP251XFD_REG_OSC_CLKODIV_10);
+	osc_reference = MCP251XFD_REG_OSC_OSCRDY;
+	osc_mask = MCP251XFD_REG_OSC_OSCRDY | MCP251XFD_REG_OSC_PLLRDY;
 
 	/* Note:
 	 *
@@ -538,19 +538,19 @@ static int mcp25xxfd_chip_clock_enable(const struct mcp25xxfd_priv *priv)
 	 * removes the "Oscillator Disable" bit and powers it up. All
 	 * other bits are unaffected.
 	 */
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_OSC, osc);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
 	if (err)
 		return err;
 
 	/* Wait for "Oscillator Ready" bit */
-	err = regmap_read_poll_timeout(priv->map_reg, MCP25XXFD_REG_OSC, osc,
+	err = regmap_read_poll_timeout(priv->map_reg, MCP251XFD_REG_OSC, osc,
 				       (osc & osc_mask) == osc_reference,
-				       MCP25XXFD_OSC_STAB_SLEEP_US,
-				       MCP25XXFD_OSC_STAB_TIMEOUT_US);
-	if (mcp25xxfd_osc_invalid(osc)) {
+				       MCP251XFD_OSC_STAB_SLEEP_US,
+				       MCP251XFD_OSC_STAB_TIMEOUT_US);
+	if (mcp251xfd_osc_invalid(osc)) {
 		netdev_err(priv->ndev,
 			   "Failed to detect %s (osc=0x%08x).\n",
-			   mcp25xxfd_get_model_str(priv), osc);
+			   mcp251xfd_get_model_str(priv), osc);
 		return -ENODEV;
 	} else if (err == -ETIMEDOUT) {
 		netdev_err(priv->ndev,
@@ -564,19 +564,19 @@ static int mcp25xxfd_chip_clock_enable(const struct mcp25xxfd_priv *priv)
 	return 0;
 }
 
-static int mcp25xxfd_chip_softreset_do(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_softreset_do(const struct mcp251xfd_priv *priv)
 {
-	const __be16 cmd = mcp25xxfd_cmd_reset();
+	const __be16 cmd = mcp251xfd_cmd_reset();
 	int err;
 
 	/* The Set Mode and SPI Reset command only seems to works if
 	 * the controller is not in Sleep Mode.
 	 */
-	err = mcp25xxfd_chip_clock_enable(priv);
+	err = mcp251xfd_chip_clock_enable(priv);
 	if (err)
 		return err;
 
-	err = mcp25xxfd_chip_set_mode(priv, MCP25XXFD_REG_CON_MODE_CONFIG);
+	err = mcp251xfd_chip_set_mode(priv, MCP251XFD_REG_CON_MODE_CONFIG);
 	if (err)
 		return err;
 
@@ -584,29 +584,29 @@ static int mcp25xxfd_chip_softreset_do(const struct mcp25xxfd_priv *priv)
 	return spi_write_then_read(priv->spi, &cmd, sizeof(cmd), NULL, 0);
 }
 
-static int mcp25xxfd_chip_softreset_check(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_softreset_check(const struct mcp251xfd_priv *priv)
 {
 	u32 osc, osc_reference;
 	u8 mode;
 	int err;
 
-	err = mcp25xxfd_chip_get_mode(priv, &mode);
+	err = mcp251xfd_chip_get_mode(priv, &mode);
 	if (err)
 		return err;
 
-	if (mode != MCP25XXFD_REG_CON_MODE_CONFIG) {
+	if (mode != MCP251XFD_REG_CON_MODE_CONFIG) {
 		netdev_info(priv->ndev,
 			    "Controller not in Config Mode after reset, but in %s Mode (%u).\n",
-			    mcp25xxfd_get_mode_str(mode), mode);
+			    mcp251xfd_get_mode_str(mode), mode);
 		return -ETIMEDOUT;
 	}
 
-	osc_reference = MCP25XXFD_REG_OSC_OSCRDY |
-		FIELD_PREP(MCP25XXFD_REG_OSC_CLKODIV_MASK,
-			   MCP25XXFD_REG_OSC_CLKODIV_10);
+	osc_reference = MCP251XFD_REG_OSC_OSCRDY |
+		FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,
+			   MCP251XFD_REG_OSC_CLKODIV_10);
 
 	/* check reset defaults of OSC reg */
-	err = regmap_read(priv->map_reg, MCP25XXFD_REG_OSC, &osc);
+	err = regmap_read(priv->map_reg, MCP251XFD_REG_OSC, &osc);
 	if (err)
 		return err;
 
@@ -620,22 +620,22 @@ static int mcp25xxfd_chip_softreset_check(const struct mcp25xxfd_priv *priv)
 	return 0;
 }
 
-static int mcp25xxfd_chip_softreset(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_softreset(const struct mcp251xfd_priv *priv)
 {
 	int err, i;
 
-	for (i = 0; i < MCP25XXFD_SOFTRESET_RETRIES_MAX; i++) {
+	for (i = 0; i < MCP251XFD_SOFTRESET_RETRIES_MAX; i++) {
 		if (i)
 			netdev_info(priv->ndev,
 				    "Retrying to reset Controller.\n");
 
-		err = mcp25xxfd_chip_softreset_do(priv);
+		err = mcp251xfd_chip_softreset_do(priv);
 		if (err == -ETIMEDOUT)
 			continue;
 		if (err)
 			return err;
 
-		err = mcp25xxfd_chip_softreset_check(priv);
+		err = mcp251xfd_chip_softreset_check(priv);
 		if (err == -ETIMEDOUT)
 			continue;
 		if (err)
@@ -650,7 +650,7 @@ static int mcp25xxfd_chip_softreset(const struct mcp25xxfd_priv *priv)
 	return -ETIMEDOUT;
 }
 
-static int mcp25xxfd_chip_clock_init(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_clock_init(const struct mcp251xfd_priv *priv)
 {
 	u32 osc;
 	int err;
@@ -659,10 +659,10 @@ static int mcp25xxfd_chip_clock_init(const struct mcp25xxfd_priv *priv)
 	 * works on the MCP2518FD. The MCP2517FD will go into normal
 	 * Sleep Mode instead.
 	 */
-	osc = MCP25XXFD_REG_OSC_LPMEN |
-		FIELD_PREP(MCP25XXFD_REG_OSC_CLKODIV_MASK,
-			   MCP25XXFD_REG_OSC_CLKODIV_10);
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_OSC, osc);
+	osc = MCP251XFD_REG_OSC_LPMEN |
+		FIELD_PREP(MCP251XFD_REG_OSC_CLKODIV_MASK,
+			   MCP251XFD_REG_OSC_CLKODIV_10);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_OSC, osc);
 	if (err)
 		return err;
 
@@ -671,11 +671,11 @@ static int mcp25xxfd_chip_clock_init(const struct mcp25xxfd_priv *priv)
 	 * This means an overflow of the 32 bit Time Base Counter
 	 * register at 40 MHz every 107 seconds.
 	 */
-	return regmap_write(priv->map_reg, MCP25XXFD_REG_TSCON,
-			    MCP25XXFD_REG_TSCON_TBCEN);
+	return regmap_write(priv->map_reg, MCP251XFD_REG_TSCON,
+			    MCP251XFD_REG_TSCON_TBCEN);
 }
 
-static int mcp25xxfd_set_bittiming(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_set_bittiming(const struct mcp251xfd_priv *priv)
 {
 	const struct can_bittiming *bt = &priv->can.bittiming;
 	const struct can_bittiming *dbt = &priv->can.data_bittiming;
@@ -699,32 +699,32 @@ static int mcp25xxfd_set_bittiming(const struct mcp25xxfd_priv *priv)
 	 * - protocol exception is treated as a form error
 	 * - Do not compare data bytes
 	 */
-	val = FIELD_PREP(MCP25XXFD_REG_CON_REQOP_MASK,
-			 MCP25XXFD_REG_CON_MODE_CONFIG) |
-		MCP25XXFD_REG_CON_STEF |
-		MCP25XXFD_REG_CON_ESIGM |
-		MCP25XXFD_REG_CON_RTXAT |
-		FIELD_PREP(MCP25XXFD_REG_CON_WFT_MASK,
-			   MCP25XXFD_REG_CON_WFT_T11FILTER) |
-		MCP25XXFD_REG_CON_WAKFIL |
-		MCP25XXFD_REG_CON_PXEDIS;
+	val = FIELD_PREP(MCP251XFD_REG_CON_REQOP_MASK,
+			 MCP251XFD_REG_CON_MODE_CONFIG) |
+		MCP251XFD_REG_CON_STEF |
+		MCP251XFD_REG_CON_ESIGM |
+		MCP251XFD_REG_CON_RTXAT |
+		FIELD_PREP(MCP251XFD_REG_CON_WFT_MASK,
+			   MCP251XFD_REG_CON_WFT_T11FILTER) |
+		MCP251XFD_REG_CON_WAKFIL |
+		MCP251XFD_REG_CON_PXEDIS;
 
 	if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO))
-		val |= MCP25XXFD_REG_CON_ISOCRCEN;
+		val |= MCP251XFD_REG_CON_ISOCRCEN;
 
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_CON, val);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_CON, val);
 	if (err)
 		return err;
 
 	/* Nominal Bit Time */
-	val = FIELD_PREP(MCP25XXFD_REG_NBTCFG_BRP_MASK, bt->brp - 1) |
-		FIELD_PREP(MCP25XXFD_REG_NBTCFG_TSEG1_MASK,
+	val = FIELD_PREP(MCP251XFD_REG_NBTCFG_BRP_MASK, bt->brp - 1) |
+		FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG1_MASK,
 			   bt->prop_seg + bt->phase_seg1 - 1) |
-		FIELD_PREP(MCP25XXFD_REG_NBTCFG_TSEG2_MASK,
+		FIELD_PREP(MCP251XFD_REG_NBTCFG_TSEG2_MASK,
 			   bt->phase_seg2 - 1) |
-		FIELD_PREP(MCP25XXFD_REG_NBTCFG_SJW_MASK, bt->sjw - 1);
+		FIELD_PREP(MCP251XFD_REG_NBTCFG_SJW_MASK, bt->sjw - 1);
 
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_NBTCFG, val);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_NBTCFG, val);
 	if (err)
 		return err;
 
@@ -732,28 +732,28 @@ static int mcp25xxfd_set_bittiming(const struct mcp25xxfd_priv *priv)
 		return 0;
 
 	/* Data Bit Time */
-	val = FIELD_PREP(MCP25XXFD_REG_DBTCFG_BRP_MASK, dbt->brp - 1) |
-		FIELD_PREP(MCP25XXFD_REG_DBTCFG_TSEG1_MASK,
+	val = FIELD_PREP(MCP251XFD_REG_DBTCFG_BRP_MASK, dbt->brp - 1) |
+		FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG1_MASK,
 			   dbt->prop_seg + dbt->phase_seg1 - 1) |
-		FIELD_PREP(MCP25XXFD_REG_DBTCFG_TSEG2_MASK,
+		FIELD_PREP(MCP251XFD_REG_DBTCFG_TSEG2_MASK,
 			   dbt->phase_seg2 - 1) |
-		FIELD_PREP(MCP25XXFD_REG_DBTCFG_SJW_MASK, dbt->sjw - 1);
+		FIELD_PREP(MCP251XFD_REG_DBTCFG_SJW_MASK, dbt->sjw - 1);
 
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_DBTCFG, val);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_DBTCFG, val);
 	if (err)
 		return err;
 
 	/* Transmitter Delay Compensation */
 	tdco = clamp_t(int, dbt->brp * (dbt->prop_seg + dbt->phase_seg1),
 		       -64, 63);
-	val = FIELD_PREP(MCP25XXFD_REG_TDC_TDCMOD_MASK,
-			 MCP25XXFD_REG_TDC_TDCMOD_AUTO) |
-		FIELD_PREP(MCP25XXFD_REG_TDC_TDCO_MASK, tdco);
+	val = FIELD_PREP(MCP251XFD_REG_TDC_TDCMOD_MASK,
+			 MCP251XFD_REG_TDC_TDCMOD_AUTO) |
+		FIELD_PREP(MCP251XFD_REG_TDC_TDCO_MASK, tdco);
 
-	return regmap_write(priv->map_reg, MCP25XXFD_REG_TDC, val);
+	return regmap_write(priv->map_reg, MCP251XFD_REG_TDC, val);
 }
 
-static int mcp25xxfd_chip_rx_int_enable(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_rx_int_enable(const struct mcp251xfd_priv *priv)
 {
 	u32 val;
 
@@ -769,12 +769,12 @@ static int mcp25xxfd_chip_rx_int_enable(const struct mcp25xxfd_priv *priv)
 	 * (in the first byte of the SPI transfer) and configuring the
 	 * PIN as interrupt (in the last byte of the SPI transfer).
 	 */
-	val = MCP25XXFD_REG_IOCON_PM0 | MCP25XXFD_REG_IOCON_TRIS1 |
-		MCP25XXFD_REG_IOCON_TRIS0;
-	return regmap_write(priv->map_reg, MCP25XXFD_REG_IOCON, val);
+	val = MCP251XFD_REG_IOCON_PM0 | MCP251XFD_REG_IOCON_TRIS1 |
+		MCP251XFD_REG_IOCON_TRIS0;
+	return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
 }
 
-static int mcp25xxfd_chip_rx_int_disable(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_rx_int_disable(const struct mcp251xfd_priv *priv)
 {
 	u32 val;
 
@@ -785,14 +785,14 @@ static int mcp25xxfd_chip_rx_int_disable(const struct mcp25xxfd_priv *priv)
 	 * - PIN0: GPIO Input
 	 * - PIN1: GPIO Input
 	 */
-	val = MCP25XXFD_REG_IOCON_PM1 | MCP25XXFD_REG_IOCON_PM0 |
-		MCP25XXFD_REG_IOCON_TRIS1 | MCP25XXFD_REG_IOCON_TRIS0;
-	return regmap_write(priv->map_reg, MCP25XXFD_REG_IOCON, val);
+	val = MCP251XFD_REG_IOCON_PM1 | MCP251XFD_REG_IOCON_PM0 |
+		MCP251XFD_REG_IOCON_TRIS1 | MCP251XFD_REG_IOCON_TRIS0;
+	return regmap_write(priv->map_reg, MCP251XFD_REG_IOCON, val);
 }
 
 static int
-mcp25xxfd_chip_rx_fifo_init_one(const struct mcp25xxfd_priv *priv,
-				const struct mcp25xxfd_rx_ring *ring)
+mcp251xfd_chip_rx_fifo_init_one(const struct mcp251xfd_priv *priv,
+				const struct mcp251xfd_rx_ring *ring)
 {
 	u32 fifo_con;
 
@@ -802,89 +802,89 @@ mcp25xxfd_chip_rx_fifo_init_one(const struct mcp25xxfd_priv *priv,
 	 * generate a RXOVIF, use this to properly detect RX MAB
 	 * overflows.
 	 */
-	fifo_con = FIELD_PREP(MCP25XXFD_REG_FIFOCON_FSIZE_MASK,
+	fifo_con = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,
 			      ring->obj_num - 1) |
-		MCP25XXFD_REG_FIFOCON_RXTSEN |
-		MCP25XXFD_REG_FIFOCON_RXOVIE |
-		MCP25XXFD_REG_FIFOCON_TFNRFNIE;
+		MCP251XFD_REG_FIFOCON_RXTSEN |
+		MCP251XFD_REG_FIFOCON_RXOVIE |
+		MCP251XFD_REG_FIFOCON_TFNRFNIE;
 
 	if (priv->can.ctrlmode & (CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_FD))
-		fifo_con |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_PLSIZE_MASK,
-				       MCP25XXFD_REG_FIFOCON_PLSIZE_64);
+		fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,
+				       MCP251XFD_REG_FIFOCON_PLSIZE_64);
 	else
-		fifo_con |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_PLSIZE_MASK,
-				       MCP25XXFD_REG_FIFOCON_PLSIZE_8);
+		fifo_con |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,
+				       MCP251XFD_REG_FIFOCON_PLSIZE_8);
 
 	return regmap_write(priv->map_reg,
-			    MCP25XXFD_REG_FIFOCON(ring->fifo_nr), fifo_con);
+			    MCP251XFD_REG_FIFOCON(ring->fifo_nr), fifo_con);
 }
 
 static int
-mcp25xxfd_chip_rx_filter_init_one(const struct mcp25xxfd_priv *priv,
-				  const struct mcp25xxfd_rx_ring *ring)
+mcp251xfd_chip_rx_filter_init_one(const struct mcp251xfd_priv *priv,
+				  const struct mcp251xfd_rx_ring *ring)
 {
 	u32 fltcon;
 
-	fltcon = MCP25XXFD_REG_FLTCON_FLTEN(ring->nr) |
-		MCP25XXFD_REG_FLTCON_FBP(ring->nr, ring->fifo_nr);
+	fltcon = MCP251XFD_REG_FLTCON_FLTEN(ring->nr) |
+		MCP251XFD_REG_FLTCON_FBP(ring->nr, ring->fifo_nr);
 
 	return regmap_update_bits(priv->map_reg,
-				  MCP25XXFD_REG_FLTCON(ring->nr >> 2),
-				  MCP25XXFD_REG_FLTCON_FLT_MASK(ring->nr),
+				  MCP251XFD_REG_FLTCON(ring->nr >> 2),
+				  MCP251XFD_REG_FLTCON_FLT_MASK(ring->nr),
 				  fltcon);
 }
 
-static int mcp25xxfd_chip_fifo_init(const struct mcp25xxfd_priv *priv)
+static int mcp251xfd_chip_fifo_init(const struct mcp251xfd_priv *priv)
 {
-	const struct mcp25xxfd_tx_ring *tx_ring = priv->tx;
-	const struct mcp25xxfd_rx_ring *rx_ring;
+	const struct mcp251xfd_tx_ring *tx_ring = priv->tx;
+	const struct mcp251xfd_rx_ring *rx_ring;
 	u32 val;
 	int err, n;
 
 	/* TEF */
-	val = FIELD_PREP(MCP25XXFD_REG_TEFCON_FSIZE_MASK,
+	val = FIELD_PREP(MCP251XFD_REG_TEFCON_FSIZE_MASK,
 			 tx_ring->obj_num - 1) |
-		MCP25XXFD_REG_TEFCON_TEFTSEN |
-		MCP25XXFD_REG_TEFCON_TEFOVIE |
-		MCP25XXFD_REG_TEFCON_TEFNEIE;
+		MCP251XFD_REG_TEFCON_TEFTSEN |
+		MCP251XFD_REG_TEFCON_TEFOVIE |
+		MCP251XFD_REG_TEFCON_TEFNEIE;
 
-	err = regmap_write(priv->map_reg, MCP25XXFD_REG_TEFCON, val);
+	err = regmap_write(priv->map_reg, MCP251XFD_REG_TEFCON, val);
 	if (err)
 		return err;
 
 	/* FIFO 1 - TX */
-	val = FIELD_PREP(MCP25XXFD_REG_FIFOCON_FSIZE_MASK,
+	val = FIELD_PREP(MCP251XFD_REG_FIFOCON_FSIZE_MASK,
 			 tx_ring->obj_num - 1) |
-		MCP25XXFD_REG_FIFOCON_TXEN |
-		MCP25XXFD_REG_FIFOCON_TXATIE;
+		MCP251XFD_REG_FIFOCON_TXEN |
+		MCP251XFD_REG_FIFOCON_TXATIE;
 
 	if (priv->can.ctrlmode & (CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_FD))
-		val |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_PLSIZE_MASK,
-				  MCP25XXFD_REG_FIFOCON_PLSIZE_64);
+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,
+				  MCP251XFD_REG_FIFOCON_PLSIZE_64);
 	else
-		val |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_PLSIZE_MASK,
-				  MCP25XXFD_REG_FIFOCON_PLSIZE_8);
+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_PLSIZE_MASK,
+				  MCP251XFD_REG_FIFOCON_PLSIZE_8);
 
 	if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
-		val |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_TXAT_MASK,
-				  MCP25XXFD_REG_FIFOCON_TXAT_ONE_SHOT);
+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,
+				  MCP251XFD_REG_FIFOCON_TXAT_ONE_SHOT);
 	else
-		val |= FIELD_PREP(MCP25XXFD_REG_FIFOCON_TXAT_MASK,
-				  MCP25XXFD_REG_FIFOCON_TXAT_UNLIMITED);
+		val |= FIELD_PREP(MCP251XFD_REG_FIFOCON_TXAT_MASK,
+				  MCP251XFD_REG_FIFOCON_TXAT_UNLIMITED);
 
 	err = regmap_write(priv->map_reg,
-			   MCP25XXFD_REG_FIFOCON(MCP25XXFD_TX_FIFO),
+			   MCP251XFD_REG_FIFOCON(MCP251XFD_TX_FIFO),
 			   val);
 	if (err)
 		return err;
 
 	/* RX FIFOs */
-	mcp25xxfd_for_each_rx_ring(priv, rx_ring, n) {
-		err = mcp25xxfd_chip_rx_fifo_init_one(priv, rx_ring);
+	mcp251xfd_for_each_rx_ring(priv, rx_ring, n) {
+		err = mcp251xfd_chip_rx_fifo_init_one(priv, rx_ring);
 		if (err)
 			return err;
 
-		err = mcp25xxfd_chip_rx_filter_init_one(priv, rx_ring);
+		err = mcp251xfd_chip_rx_filter_init_one(priv, rx_ring);
 		if (err)
 			return err;
 	}
@@ -892,195 +892,195 @@ static int mcp25xxfd_chip_fifo_init(const struct mcp25xxfd_priv *priv)
 	return 0;
 }
 
-static int mcp25xxfd_chip_ecc_init(struct mcp25xxfd_priv *priv