media: atomisp: get rid of spmem_dump.c

Those files seem to be firmware-dependent, probably being used
by some debug interface.

Well, their contents are not really used by atomisp, so let's
just send them to the trash can, as it shouldn't have any
usage upstream.

Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

4 files changed, 0 insertions, 3907 deletions

diff --git a/drivers/staging/media/atomisp/Makefile b/drivers/staging/media/atomisp/Makefile
index 4f09d0c431da..30b3168c4358 100644
--- a/drivers/staging/media/atomisp/Makefile
+++ b/drivers/staging/media/atomisp/Makefile
@@ -165,15 +165,12 @@ obj-byt = \
 	pci/css_2400_system/hive/ia_css_isp_configs.o \
 	pci/css_2400_system/hive/ia_css_isp_params.o \
 	pci/css_2400_system/hive/ia_css_isp_states.o \
-	pci/css_2400_system/spmem_dump.o \
 
 # These will be needed when clean merge CHT support nicely into the driver
 # Keep them here handy for when we get to that point
 #
 
 obj-cht = \
-	pci/css_2401_system/spmem_dump.o \
-	pci/css_2401_system/spmem_dump.o \
 	pci/css_2401_system/hive/ia_css_isp_configs.o \
 	pci/css_2401_system/hive/ia_css_isp_params.o \
 	pci/css_2401_system/hive/ia_css_isp_states.o \
diff --git a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c b/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c
deleted file mode 100644
index 300347dbba2b..000000000000
--- a/drivers/staging/media/atomisp/pci/css_2400_system/spmem_dump.c
+++ /dev/null
@@ -1,1935 +0,0 @@
-/*
- * Support for Intel Camera Imaging ISP subsystem.
- * Copyright (c) 2015, Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#ifndef _sp_map_h_
-#define _sp_map_h_
-
-#ifndef _hrt_dummy_use_blob_sp
-#define _hrt_dummy_use_blob_sp()
-#endif
-
-#define _hrt_cell_load_program_sp(proc) _hrt_cell_load_program_embedded(proc, sp)
-
-/* function input_system_acquisition_stop: ADE */
-
-/* function longjmp: 684E */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_HIVE_IF_SRST_MASK
-#define HIVE_MEM_HIVE_IF_SRST_MASK scalar_processor_2400_dmem
-#define HIVE_ADDR_HIVE_IF_SRST_MASK 0x1C8
-#define HIVE_SIZE_HIVE_IF_SRST_MASK 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_HIVE_IF_SRST_MASK scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_HIVE_IF_SRST_MASK 0x1C8
-#define HIVE_SIZE_sp_HIVE_IF_SRST_MASK 16
-
-/* function tmpmem_init_dmem: 6580 */
-
-/* function ia_css_isys_sp_token_map_receive_ack: 5EC4 */
-
-/* function ia_css_dmaproxy_sp_set_addr_B: 332C */
-
-/* function debug_buffer_set_ddr_addr: DD */
-
-/* function receiver_port_reg_load: AC2 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_vbuf_mipi
-#define HIVE_MEM_vbuf_mipi scalar_processor_2400_dmem
-#define HIVE_ADDR_vbuf_mipi 0x631C
-#define HIVE_SIZE_vbuf_mipi 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_vbuf_mipi scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_vbuf_mipi 0x631C
-#define HIVE_SIZE_sp_vbuf_mipi 12
-
-/* function ia_css_event_sp_decode: 351D */
-
-/* function ia_css_queue_get_size: 48A5 */
-
-/* function ia_css_queue_load: 4EE6 */
-
-/* function setjmp: 6857 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_sp2host_isys_event_queue
-#define HIVE_MEM_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_sp2host_isys_event_queue 0x4684
-#define HIVE_SIZE_sem_for_sp2host_isys_event_queue 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_sp2host_isys_event_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_sp2host_isys_event_queue 0x4684
-#define HIVE_SIZE_sp_sem_for_sp2host_isys_event_queue 20
-
-/* function ia_css_dmaproxy_sp_wait_for_ack: 6E07 */
-
-/* function ia_css_sp_rawcopy_func: 510B */
-
-/* function ia_css_tagger_buf_sp_pop_marked: 29F7 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_isp_stage
-#define HIVE_MEM_isp_stage scalar_processor_2400_dmem
-#define HIVE_ADDR_isp_stage 0x5C00
-#define HIVE_SIZE_isp_stage 832
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_isp_stage scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_isp_stage 0x5C00
-#define HIVE_SIZE_sp_isp_stage 832
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_vbuf_raw
-#define HIVE_MEM_vbuf_raw scalar_processor_2400_dmem
-#define HIVE_ADDR_vbuf_raw 0x2F4
-#define HIVE_SIZE_vbuf_raw 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_vbuf_raw scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_vbuf_raw 0x2F4
-#define HIVE_SIZE_sp_vbuf_raw 4
-
-/* function ia_css_sp_bin_copy_func: 5032 */
-
-/* function ia_css_queue_item_store: 4C34 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs
-#define HIVE_MEM_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0
-#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_metadata_bufs 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_metadata_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 0x4AA0
-#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_metadata_bufs 20
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs
-#define HIVE_MEM_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4
-#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_buffer_bufs 160
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_buffer_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 0x4AB4
-#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_buffer_bufs 160
-
-/* function sp_start_isp: 45D */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_binary_group
-#define HIVE_MEM_sp_binary_group scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_binary_group 0x5FF0
-#define HIVE_SIZE_sp_binary_group 32
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_binary_group scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_binary_group 0x5FF0
-#define HIVE_SIZE_sp_sp_binary_group 32
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_sw_state
-#define HIVE_MEM_sp_sw_state scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sw_state 0x62AC
-#define HIVE_SIZE_sp_sw_state 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_sw_state scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_sw_state 0x62AC
-#define HIVE_SIZE_sp_sp_sw_state 4
-
-/* function ia_css_thread_sp_main: D5B */
-
-/* function ia_css_ispctrl_sp_init_internal_buffers: 3723 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp2host_psys_event_queue_handle
-#define HIVE_MEM_sp2host_psys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp2host_psys_event_queue_handle 0x4B54
-#define HIVE_SIZE_sp2host_psys_event_queue_handle 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp2host_psys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp2host_psys_event_queue_handle 0x4B54
-#define HIVE_SIZE_sp_sp2host_psys_event_queue_handle 12
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_sp2host_psys_event_queue
-#define HIVE_MEM_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_sp2host_psys_event_queue 0x4698
-#define HIVE_SIZE_sem_for_sp2host_psys_event_queue 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_sp2host_psys_event_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_sp2host_psys_event_queue 0x4698
-#define HIVE_SIZE_sp_sem_for_sp2host_psys_event_queue 20
-
-/* function ia_css_tagger_sp_propagate_frame: 2410 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_stop_copy_preview
-#define HIVE_MEM_sp_stop_copy_preview scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_stop_copy_preview 0x6290
-#define HIVE_SIZE_sp_stop_copy_preview 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_stop_copy_preview scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_stop_copy_preview 0x6290
-#define HIVE_SIZE_sp_sp_stop_copy_preview 4
-
-/* function input_system_reg_load: B17 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_vbuf_handles
-#define HIVE_MEM_vbuf_handles scalar_processor_2400_dmem
-#define HIVE_ADDR_vbuf_handles 0x6328
-#define HIVE_SIZE_vbuf_handles 960
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_vbuf_handles scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_vbuf_handles 0x6328
-#define HIVE_SIZE_sp_vbuf_handles 960
-
-/* function ia_css_queue_store: 4D9A */
-
-/* function ia_css_sp_flash_register: 2C2C */
-
-/* function ia_css_sp_rawcopy_dummy_function: 5652 */
-
-/* function ia_css_isys_sp_backend_create: 5B37 */
-
-/* function ia_css_pipeline_sp_init: 1833 */
-
-/* function ia_css_tagger_sp_configure: 2300 */
-
-/* function ia_css_ispctrl_sp_end_binary: 3566 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs
-#define HIVE_MEM_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60
-#define HIVE_SIZE_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 0x4B60
-#define HIVE_SIZE_sp_ia_css_bufq_sp_h_pipe_private_per_frame_ddr_ptrs 20
-
-/* function receiver_port_reg_store: AC9 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_event_is_pending_mask
-#define HIVE_MEM_event_is_pending_mask scalar_processor_2400_dmem
-#define HIVE_ADDR_event_is_pending_mask 0x5C
-#define HIVE_SIZE_event_is_pending_mask 44
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_event_is_pending_mask scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_event_is_pending_mask 0x5C
-#define HIVE_SIZE_sp_event_is_pending_mask 44
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_all_cb_elems_frame
-#define HIVE_MEM_sp_all_cb_elems_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_all_cb_elems_frame 0x46AC
-#define HIVE_SIZE_sp_all_cb_elems_frame 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_all_cb_elems_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_all_cb_elems_frame 0x46AC
-#define HIVE_SIZE_sp_sp_all_cb_elems_frame 16
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp2host_isys_event_queue_handle
-#define HIVE_MEM_sp2host_isys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp2host_isys_event_queue_handle 0x4B74
-#define HIVE_SIZE_sp2host_isys_event_queue_handle 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp2host_isys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp2host_isys_event_queue_handle 0x4B74
-#define HIVE_SIZE_sp_sp2host_isys_event_queue_handle 12
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_host_sp_com
-#define HIVE_MEM_host_sp_com scalar_processor_2400_dmem
-#define HIVE_ADDR_host_sp_com 0x4114
-#define HIVE_SIZE_host_sp_com 220
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_host_sp_com scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_host_sp_com 0x4114
-#define HIVE_SIZE_sp_host_sp_com 220
-
-/* function ia_css_queue_get_free_space: 49F9 */
-
-/* function exec_image_pipe: 6C4 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_init_dmem_data
-#define HIVE_MEM_sp_init_dmem_data scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_init_dmem_data 0x62B0
-#define HIVE_SIZE_sp_init_dmem_data 24
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_init_dmem_data scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_init_dmem_data 0x62B0
-#define HIVE_SIZE_sp_sp_init_dmem_data 24
-
-/* function ia_css_sp_metadata_start: 5914 */
-
-/* function ia_css_bufq_sp_init_buffer_queues: 2C9B */
-
-/* function ia_css_pipeline_sp_stop: 1816 */
-
-/* function ia_css_tagger_sp_connect_pipes: 27EA */
-
-/* function sp_isys_copy_wait: 70D */
-
-/* function is_isp_debug_buffer_full: 337 */
-
-/* function ia_css_dmaproxy_sp_configure_channel_from_info: 32AF */
-
-/* function encode_and_post_timer_event: A30 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_per_frame_data
-#define HIVE_MEM_sp_per_frame_data scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_per_frame_data 0x41F0
-#define HIVE_SIZE_sp_per_frame_data 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_per_frame_data scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_per_frame_data 0x41F0
-#define HIVE_SIZE_sp_sp_per_frame_data 4
-
-/* function ia_css_rmgr_sp_vbuf_dequeue: 62D4 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_host2sp_psys_event_queue_handle
-#define HIVE_MEM_host2sp_psys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_host2sp_psys_event_queue_handle 0x4B80
-#define HIVE_SIZE_host2sp_psys_event_queue_handle 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_host2sp_psys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_host2sp_psys_event_queue_handle 0x4B80
-#define HIVE_SIZE_sp_host2sp_psys_event_queue_handle 12
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_xmem_bin_addr
-#define HIVE_MEM_xmem_bin_addr scalar_processor_2400_dmem
-#define HIVE_ADDR_xmem_bin_addr 0x41F4
-#define HIVE_SIZE_xmem_bin_addr 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_xmem_bin_addr scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_xmem_bin_addr 0x41F4
-#define HIVE_SIZE_sp_xmem_bin_addr 4
-
-/* function tmr_clock_init: 65A0 */
-
-/* function ia_css_pipeline_sp_run: 1403 */
-
-/* function memcpy: 68F7 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_GP_DEVICE_BASE
-#define HIVE_MEM_GP_DEVICE_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_GP_DEVICE_BASE 0x2FC
-#define HIVE_SIZE_GP_DEVICE_BASE 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_GP_DEVICE_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_GP_DEVICE_BASE 0x2FC
-#define HIVE_SIZE_sp_GP_DEVICE_BASE 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_thread_sp_ready_queue
-#define HIVE_MEM_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_thread_sp_ready_queue 0x1E0
-#define HIVE_SIZE_ia_css_thread_sp_ready_queue 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_thread_sp_ready_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_thread_sp_ready_queue 0x1E0
-#define HIVE_SIZE_sp_ia_css_thread_sp_ready_queue 12
-
-/* function input_system_reg_store: B1E */
-
-/* function ia_css_isys_sp_frontend_start: 5D4D */
-
-/* function ia_css_uds_sp_scale_params: 6600 */
-
-/* function ia_css_circbuf_increase_size: E40 */
-
-/* function __divu: 6875 */
-
-/* function ia_css_thread_sp_get_state: C83 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_cont_capt_stop
-#define HIVE_MEM_sem_for_cont_capt_stop scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_cont_capt_stop 0x46BC
-#define HIVE_SIZE_sem_for_cont_capt_stop 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_cont_capt_stop scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_cont_capt_stop 0x46BC
-#define HIVE_SIZE_sp_sem_for_cont_capt_stop 20
-
-/* function thread_fiber_sp_main: E39 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_isp_pipe_thread
-#define HIVE_MEM_sp_isp_pipe_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_isp_pipe_thread 0x4800
-#define HIVE_SIZE_sp_isp_pipe_thread 340
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_isp_pipe_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_isp_pipe_thread 0x4800
-#define HIVE_SIZE_sp_sp_isp_pipe_thread 340
-
-/* function ia_css_parambuf_sp_handle_parameter_sets: 128A */
-
-/* function ia_css_spctrl_sp_set_state: 5943 */
-
-/* function ia_css_thread_sem_sp_signal: 6AF7 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_IRQ_BASE
-#define HIVE_MEM_IRQ_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_IRQ_BASE 0x2C
-#define HIVE_SIZE_IRQ_BASE 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_IRQ_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_IRQ_BASE 0x2C
-#define HIVE_SIZE_sp_IRQ_BASE 16
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_TIMED_CTRL_BASE
-#define HIVE_MEM_TIMED_CTRL_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_TIMED_CTRL_BASE 0x40
-#define HIVE_SIZE_TIMED_CTRL_BASE 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_TIMED_CTRL_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_TIMED_CTRL_BASE 0x40
-#define HIVE_SIZE_sp_TIMED_CTRL_BASE 4
-
-/* function ia_css_isys_sp_isr: 6FDC */
-
-/* function ia_css_isys_sp_generate_exp_id: 60E5 */
-
-/* function ia_css_rmgr_sp_init: 61CF */
-
-/* function ia_css_thread_sem_sp_init: 6BC8 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_is_isp_requested
-#define HIVE_MEM_is_isp_requested scalar_processor_2400_dmem
-#define HIVE_ADDR_is_isp_requested 0x308
-#define HIVE_SIZE_is_isp_requested 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_is_isp_requested scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_is_isp_requested 0x308
-#define HIVE_SIZE_sp_is_isp_requested 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_reading_cb_frame
-#define HIVE_MEM_sem_for_reading_cb_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_reading_cb_frame 0x46D0
-#define HIVE_SIZE_sem_for_reading_cb_frame 40
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_reading_cb_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_reading_cb_frame 0x46D0
-#define HIVE_SIZE_sp_sem_for_reading_cb_frame 40
-
-/* function ia_css_dmaproxy_sp_execute: 3217 */
-
-/* function ia_css_queue_is_empty: 48E0 */
-
-/* function ia_css_pipeline_sp_has_stopped: 180C */
-
-/* function ia_css_circbuf_extract: F44 */
-
-/* function ia_css_tagger_buf_sp_is_locked_from_start: 2B0D */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_current_sp_thread
-#define HIVE_MEM_current_sp_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_current_sp_thread 0x1DC
-#define HIVE_SIZE_current_sp_thread 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_current_sp_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_current_sp_thread 0x1DC
-#define HIVE_SIZE_sp_current_sp_thread 4
-
-/* function ia_css_spctrl_sp_get_spid: 594A */
-
-/* function ia_css_bufq_sp_reset_buffers: 2D22 */
-
-/* function ia_css_dmaproxy_sp_read_byte_addr: 6E35 */
-
-/* function ia_css_rmgr_sp_uninit: 61C8 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_threads_stack
-#define HIVE_MEM_sp_threads_stack scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_threads_stack 0x164
-#define HIVE_SIZE_sp_threads_stack 28
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_threads_stack scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_threads_stack 0x164
-#define HIVE_SIZE_sp_sp_threads_stack 28
-
-/* function ia_css_circbuf_peek: F26 */
-
-/* function ia_css_parambuf_sp_wait_for_in_param: 1053 */
-
-/* function ia_css_isys_sp_token_map_get_exp_id: 5FAD */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_all_cb_elems_param
-#define HIVE_MEM_sp_all_cb_elems_param scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_all_cb_elems_param 0x46F8
-#define HIVE_SIZE_sp_all_cb_elems_param 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_all_cb_elems_param scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_all_cb_elems_param 0x46F8
-#define HIVE_SIZE_sp_sp_all_cb_elems_param 16
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_pipeline_sp_curr_binary_id
-#define HIVE_MEM_pipeline_sp_curr_binary_id scalar_processor_2400_dmem
-#define HIVE_ADDR_pipeline_sp_curr_binary_id 0x1EC
-#define HIVE_SIZE_pipeline_sp_curr_binary_id 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_pipeline_sp_curr_binary_id scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_pipeline_sp_curr_binary_id 0x1EC
-#define HIVE_SIZE_sp_pipeline_sp_curr_binary_id 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_all_cbs_frame_desc
-#define HIVE_MEM_sp_all_cbs_frame_desc scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_all_cbs_frame_desc 0x4708
-#define HIVE_SIZE_sp_all_cbs_frame_desc 8
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_all_cbs_frame_desc scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_all_cbs_frame_desc 0x4708
-#define HIVE_SIZE_sp_sp_all_cbs_frame_desc 8
-
-/* function sp_isys_copy_func_v2: 706 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_reading_cb_param
-#define HIVE_MEM_sem_for_reading_cb_param scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_reading_cb_param 0x4710
-#define HIVE_SIZE_sem_for_reading_cb_param 40
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_reading_cb_param scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_reading_cb_param 0x4710
-#define HIVE_SIZE_sp_sem_for_reading_cb_param 40
-
-/* function ia_css_queue_get_used_space: 49AD */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_cont_capt_start
-#define HIVE_MEM_sem_for_cont_capt_start scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_cont_capt_start 0x4738
-#define HIVE_SIZE_sem_for_cont_capt_start 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_cont_capt_start scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_cont_capt_start 0x4738
-#define HIVE_SIZE_sp_sem_for_cont_capt_start 20
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_tmp_heap
-#define HIVE_MEM_tmp_heap scalar_processor_2400_dmem
-#define HIVE_ADDR_tmp_heap 0x6010
-#define HIVE_SIZE_tmp_heap 640
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_tmp_heap scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_tmp_heap 0x6010
-#define HIVE_SIZE_sp_tmp_heap 640
-
-/* function ia_css_rmgr_sp_get_num_vbuf: 64D8 */
-
-/* function ia_css_ispctrl_sp_output_compute_dma_info: 3F49 */
-
-/* function ia_css_tagger_sp_lock_exp_id: 20CD */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs
-#define HIVE_MEM_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C
-#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_s3a_bufs 60
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_s3a_bufs scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 0x4B8C
-#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_s3a_bufs 60
-
-/* function ia_css_queue_is_full: 4A44 */
-
-/* function debug_buffer_init_isp: E4 */
-
-/* function ia_css_isys_sp_frontend_uninit: 5D07 */
-
-/* function ia_css_tagger_sp_exp_id_is_locked: 2003 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem
-#define HIVE_MEM_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_rmgr_sp_mipi_frame_sem 0x66E8
-#define HIVE_SIZE_ia_css_rmgr_sp_mipi_frame_sem 60
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_rmgr_sp_mipi_frame_sem scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_rmgr_sp_mipi_frame_sem 0x66E8
-#define HIVE_SIZE_sp_ia_css_rmgr_sp_mipi_frame_sem 60
-
-/* function ia_css_rmgr_sp_refcount_dump: 62AF */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id
-#define HIVE_MEM_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8
-#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_isp_parameters_id 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 0x4BC8
-#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_isp_parameters_id 20
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_pipe_threads
-#define HIVE_MEM_sp_pipe_threads scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_pipe_threads 0x150
-#define HIVE_SIZE_sp_pipe_threads 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_pipe_threads scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_pipe_threads 0x150
-#define HIVE_SIZE_sp_sp_pipe_threads 20
-
-/* function sp_event_proxy_func: 71B */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_host2sp_isys_event_queue_handle
-#define HIVE_MEM_host2sp_isys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_host2sp_isys_event_queue_handle 0x4BDC
-#define HIVE_SIZE_host2sp_isys_event_queue_handle 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_host2sp_isys_event_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_host2sp_isys_event_queue_handle 0x4BDC
-#define HIVE_SIZE_sp_host2sp_isys_event_queue_handle 12
-
-/* function ia_css_thread_sp_yield: 6A70 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_all_cbs_param_desc
-#define HIVE_MEM_sp_all_cbs_param_desc scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_all_cbs_param_desc 0x474C
-#define HIVE_SIZE_sp_all_cbs_param_desc 8
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_all_cbs_param_desc scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_all_cbs_param_desc 0x474C
-#define HIVE_SIZE_sp_sp_all_cbs_param_desc 8
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb
-#define HIVE_MEM_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4
-#define HIVE_SIZE_ia_css_dmaproxy_sp_invalidate_tlb 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_dmaproxy_sp_invalidate_tlb scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_dmaproxy_sp_invalidate_tlb 0x5BF4
-#define HIVE_SIZE_sp_ia_css_dmaproxy_sp_invalidate_tlb 4
-
-/* function ia_css_thread_sp_fork: D10 */
-
-/* function ia_css_tagger_sp_destroy: 27F4 */
-
-/* function ia_css_dmaproxy_sp_vmem_read: 31B7 */
-
-/* function ia_css_ifmtr_sp_init: 6136 */
-
-/* function initialize_sp_group: 6D4 */
-
-/* function ia_css_tagger_buf_sp_peek: 2919 */
-
-/* function ia_css_thread_sp_init: D3C */
-
-/* function ia_css_isys_sp_reset_exp_id: 60DD */
-
-/* function qos_scheduler_update_fps: 65F0 */
-
-/* function ia_css_ispctrl_sp_set_stream_base_addr: 461E */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ISP_DMEM_BASE
-#define HIVE_MEM_ISP_DMEM_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_ISP_DMEM_BASE 0x10
-#define HIVE_SIZE_ISP_DMEM_BASE 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ISP_DMEM_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ISP_DMEM_BASE 0x10
-#define HIVE_SIZE_sp_ISP_DMEM_BASE 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_SP_DMEM_BASE
-#define HIVE_MEM_SP_DMEM_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_SP_DMEM_BASE 0x4
-#define HIVE_SIZE_SP_DMEM_BASE 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_SP_DMEM_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_SP_DMEM_BASE 0x4
-#define HIVE_SIZE_sp_SP_DMEM_BASE 4
-
-/* function ia_css_dmaproxy_sp_read: 322D */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_raw_copy_line_count
-#define HIVE_MEM_raw_copy_line_count scalar_processor_2400_dmem
-#define HIVE_ADDR_raw_copy_line_count 0x2C8
-#define HIVE_SIZE_raw_copy_line_count 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_raw_copy_line_count scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_raw_copy_line_count 0x2C8
-#define HIVE_SIZE_sp_raw_copy_line_count 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_host2sp_tag_cmd_queue_handle
-#define HIVE_MEM_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_host2sp_tag_cmd_queue_handle 0x4BE8
-#define HIVE_SIZE_host2sp_tag_cmd_queue_handle 12
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_host2sp_tag_cmd_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_host2sp_tag_cmd_queue_handle 0x4BE8
-#define HIVE_SIZE_sp_host2sp_tag_cmd_queue_handle 12
-
-/* function ia_css_queue_peek: 4923 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_flash_sp_frame_cnt
-#define HIVE_MEM_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_flash_sp_frame_cnt 0x4A94
-#define HIVE_SIZE_ia_css_flash_sp_frame_cnt 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_flash_sp_frame_cnt scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_flash_sp_frame_cnt 0x4A94
-#define HIVE_SIZE_sp_ia_css_flash_sp_frame_cnt 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_event_can_send_token_mask
-#define HIVE_MEM_event_can_send_token_mask scalar_processor_2400_dmem
-#define HIVE_ADDR_event_can_send_token_mask 0x88
-#define HIVE_SIZE_event_can_send_token_mask 44
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_event_can_send_token_mask scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_event_can_send_token_mask 0x88
-#define HIVE_SIZE_sp_event_can_send_token_mask 44
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_isp_thread
-#define HIVE_MEM_isp_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_isp_thread 0x5F40
-#define HIVE_SIZE_isp_thread 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_isp_thread scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_isp_thread 0x5F40
-#define HIVE_SIZE_sp_isp_thread 4
-
-/* function encode_and_post_sp_event_non_blocking: A78 */
-
-/* function ia_css_isys_sp_frontend_destroy: 5DDF */
-
-/* function is_ddr_debug_buffer_full: 2CC */
-
-/* function ia_css_isys_sp_frontend_stop: 5D1F */
-
-/* function ia_css_isys_sp_token_map_init: 607B */
-
-/* function ia_css_tagger_buf_sp_get_oldest_marked_offset: 2969 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_threads_fiber
-#define HIVE_MEM_sp_threads_fiber scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_threads_fiber 0x19C
-#define HIVE_SIZE_sp_threads_fiber 28
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_threads_fiber scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_threads_fiber 0x19C
-#define HIVE_SIZE_sp_sp_threads_fiber 28
-
-/* function encode_and_post_sp_event: A01 */
-
-/* function debug_enqueue_ddr: EE */
-
-/* function ia_css_rmgr_sp_refcount_init_vbuf: 626A */
-
-/* function dmaproxy_sp_read_write: 6EE4 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer
-#define HIVE_MEM_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8
-#define HIVE_SIZE_ia_css_dmaproxy_isp_dma_cmd_buffer 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_dmaproxy_isp_dma_cmd_buffer scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 0x5BF8
-#define HIVE_SIZE_sp_ia_css_dmaproxy_isp_dma_cmd_buffer 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_host2sp_buffer_queue_handle
-#define HIVE_MEM_host2sp_buffer_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_host2sp_buffer_queue_handle 0x4BF4
-#define HIVE_SIZE_host2sp_buffer_queue_handle 480
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_host2sp_buffer_queue_handle scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_host2sp_buffer_queue_handle 0x4BF4
-#define HIVE_SIZE_sp_host2sp_buffer_queue_handle 480
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_flash_sp_in_service
-#define HIVE_MEM_ia_css_flash_sp_in_service scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_flash_sp_in_service 0x3178
-#define HIVE_SIZE_ia_css_flash_sp_in_service 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_flash_sp_in_service scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_flash_sp_in_service 0x3178
-#define HIVE_SIZE_sp_ia_css_flash_sp_in_service 4
-
-/* function ia_css_dmaproxy_sp_process: 6BF0 */
-
-/* function ia_css_tagger_buf_sp_mark_from_end: 2BF1 */
-
-/* function ia_css_isys_sp_backend_rcv_acquire_ack: 59EC */
-
-/* function ia_css_isys_sp_backend_pre_acquire_request: 5A02 */
-
-/* function ia_css_ispctrl_sp_init_cs: 3653 */
-
-/* function ia_css_spctrl_sp_init: 5958 */
-
-/* function sp_event_proxy_init: 730 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick
-#define HIVE_MEM_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4
-#define HIVE_SIZE_ia_css_bufq_sp_pipe_private_previous_clock_tick 40
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 0x4DD4
-#define HIVE_SIZE_sp_ia_css_bufq_sp_pipe_private_previous_clock_tick 40
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sp_output
-#define HIVE_MEM_sp_output scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_output 0x41F8
-#define HIVE_SIZE_sp_output 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sp_output scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sp_output 0x41F8
-#define HIVE_SIZE_sp_sp_output 16
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues
-#define HIVE_MEM_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC
-#define HIVE_SIZE_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 0x4DFC
-#define HIVE_SIZE_sp_ia_css_bufq_sp_sems_for_host2sp_buf_queues 800
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ISP_CTRL_BASE
-#define HIVE_MEM_ISP_CTRL_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_ISP_CTRL_BASE 0x8
-#define HIVE_SIZE_ISP_CTRL_BASE 4
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ISP_CTRL_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ISP_CTRL_BASE 0x8
-#define HIVE_SIZE_sp_ISP_CTRL_BASE 4
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_INPUT_FORMATTER_BASE
-#define HIVE_MEM_INPUT_FORMATTER_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_INPUT_FORMATTER_BASE 0x4C
-#define HIVE_SIZE_INPUT_FORMATTER_BASE 16
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_INPUT_FORMATTER_BASE scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_INPUT_FORMATTER_BASE 0x4C
-#define HIVE_SIZE_sp_INPUT_FORMATTER_BASE 16
-
-/* function sp_dma_proxy_reset_channels: 3487 */
-
-/* function ia_css_isys_sp_backend_acquire: 5B0D */
-
-/* function ia_css_tagger_sp_update_size: 28E8 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_ia_css_bufq_host_sp_queue
-#define HIVE_MEM_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_ia_css_bufq_host_sp_queue 0x511C
-#define HIVE_SIZE_ia_css_bufq_host_sp_queue 2008
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_ia_css_bufq_host_sp_queue scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_ia_css_bufq_host_sp_queue 0x511C
-#define HIVE_SIZE_sp_ia_css_bufq_host_sp_queue 2008
-
-/* function thread_fiber_sp_create: DA8 */
-
-/* function ia_css_dmaproxy_sp_set_increments: 3319 */
-
-#ifndef HIVE_MULTIPLE_PROGRAMS
-#ifndef HIVE_MEM_sem_for_writing_cb_frame
-#define HIVE_MEM_sem_for_writing_cb_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sem_for_writing_cb_frame 0x4754
-#define HIVE_SIZE_sem_for_writing_cb_frame 20
-#else
-#endif
-#endif
-#define HIVE_MEM_sp_sem_for_writing_cb_frame scalar_processor_2400_dmem
-#define HIVE_ADDR_sp_sem_for_writing_cb_frame 0x4754
-#define HIVE_SIZE_sp_sem_for_writing_cb_frame 20
-
-/* function receiver_reg_store: AD7 */