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authorLinus Torvalds <torvalds@linux-foundation.org>2017-07-05 12:22:23 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-07-05 12:22:23 -0700
commit8ad06e56dcbc1984ef0ff8f6e3c19982c5809f73 (patch)
tree74bc746a4f18eeddfc085b76c776ddcf2c798cfa
parent59005b0c59a164101b0273e4bda212c809dc2246 (diff)
parent035f901eac4d2d0fd40f3055026355d55d46949f (diff)
Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: "Algorithms: - add private key generation to ecdh Drivers: - add generic gcm(aes) to aesni-intel - add SafeXcel EIP197 crypto engine driver - add ecb(aes), cfb(aes) and ecb(des3_ede) to cavium - add support for CNN55XX adapters in cavium - add ctr mode to chcr - add support for gcm(aes) to omap" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (140 commits) crypto: testmgr - Reenable sha1/aes in FIPS mode crypto: ccp - Release locks before returning crypto: cavium/nitrox - dma_mapping_error() returns bool crypto: doc - fix typo in docs Documentation/bindings: Document the SafeXel cryptographic engine driver crypto: caam - fix gfp allocation flags (part II) crypto: caam - fix gfp allocation flags (part I) crypto: drbg - Fixes panic in wait_for_completion call crypto: caam - make of_device_ids const. crypto: vmx - remove unnecessary check crypto: n2 - make of_device_ids const crypto: inside-secure - use the base_end pointer in ring rollback crypto: inside-secure - increase the batch size crypto: inside-secure - only dequeue when needed crypto: inside-secure - get the backlog before dequeueing the request crypto: inside-secure - stop requeueing failed requests crypto: inside-secure - use one queue per hw ring crypto: inside-secure - update the context and request later crypto: inside-secure - align the cipher and hash send functions crypto: inside-secure - optimize DSE bufferability control ...
-rw-r--r--Documentation/crypto/api-samples.rst38
-rw-r--r--Documentation/crypto/userspace-if.rst2
-rw-r--r--Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt29
-rw-r--r--Documentation/devicetree/bindings/crypto/mediatek-crypto.txt8
-rw-r--r--Documentation/devicetree/bindings/rng/mtk-rng.txt4
-rw-r--r--Documentation/devicetree/bindings/rng/timeriomem_rng.txt7
-rw-r--r--MAINTAINERS18
-rw-r--r--arch/arm/crypto/aes-ce-glue.c6
-rw-r--r--arch/arm/crypto/crc32-ce-glue.c6
-rw-r--r--arch/arm/crypto/ghash-ce-glue.c6
-rw-r--r--arch/arm/crypto/sha1-ce-glue.c5
-rw-r--r--arch/arm/crypto/sha2-ce-glue.c5
-rw-r--r--arch/arm64/crypto/sha1-ce-core.S6
-rw-r--r--arch/arm64/crypto/sha1-ce-glue.c11
-rw-r--r--arch/arm64/crypto/sha2-ce-core.S6
-rw-r--r--arch/arm64/crypto/sha2-ce-glue.c13
-rw-r--r--arch/x86/crypto/aes-x86_64-asm_64.S47
-rw-r--r--arch/x86/crypto/aesni-intel_asm.S231
-rw-r--r--arch/x86/crypto/aesni-intel_avx-x86_64.S283
-rw-r--r--arch/x86/crypto/aesni-intel_glue.c208
-rw-r--r--arch/x86/crypto/glue_helper.c3
-rw-r--r--arch/x86/crypto/sha512-mb/sha512_mb.c7
-rw-r--r--crypto/Kconfig1
-rw-r--r--crypto/Makefile9
-rw-r--r--crypto/aes_ti.c2
-rw-r--r--crypto/algapi.c2
-rw-r--r--crypto/crypto_engine.c23
-rw-r--r--crypto/dh.c9
-rw-r--r--crypto/dh_helper.c4
-rw-r--r--crypto/drbg.c1
-rw-r--r--crypto/ecc.c88
-rw-r--r--crypto/ecc.h41
-rw-r--r--crypto/ecdh.c29
-rw-r--r--crypto/ecdh_helper.c4
-rw-r--r--crypto/hmac.c5
-rw-r--r--crypto/rng.c5
-rw-r--r--crypto/rsa-pkcs1pad.c12
-rw-r--r--crypto/rsa.c4
-rw-r--r--crypto/tcrypt.c4
-rw-r--r--crypto/testmgr.c128
-rw-r--r--crypto/testmgr.h143
-rw-r--r--drivers/char/hw_random/mtk-rng.c42
-rw-r--r--drivers/char/hw_random/omap3-rom-rng.c11
-rw-r--r--drivers/char/hw_random/timeriomem-rng.c7
-rw-r--r--drivers/crypto/Kconfig30
-rw-r--r--drivers/crypto/Makefile6
-rw-r--r--drivers/crypto/amcc/crypto4xx_core.c1
-rw-r--r--drivers/crypto/bcm/cipher.c7
-rw-r--r--drivers/crypto/caam/caamalg.c10
-rw-r--r--drivers/crypto/caam/caamalg_qi.c10
-rw-r--r--drivers/crypto/caam/caamhash.c32
-rw-r--r--drivers/crypto/caam/caampkc.c472
-rw-r--r--drivers/crypto/caam/caampkc.h58
-rw-r--r--drivers/crypto/caam/jr.c2
-rw-r--r--drivers/crypto/caam/pdb.h62
-rw-r--r--drivers/crypto/caam/pkc_desc.c36
-rw-r--r--drivers/crypto/cavium/cpt/cptvf_algs.c234
-rw-r--r--drivers/crypto/cavium/cpt/cptvf_algs.h7
-rw-r--r--drivers/crypto/cavium/cpt/cptvf_main.c2
-rw-r--r--drivers/crypto/cavium/nitrox/Kconfig21
-rw-r--r--drivers/crypto/cavium/nitrox/Makefile8
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_algs.c457
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_common.h42
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_csr.h1084
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_dev.h179
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_hal.c401
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_isr.c467
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_lib.c210
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_main.c640
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_req.h445
-rw-r--r--drivers/crypto/cavium/nitrox/nitrox_reqmgr.c735
-rw-r--r--drivers/crypto/ccp/Makefile3
-rw-r--r--drivers/crypto/ccp/ccp-crypto-sha.c5
-rw-r--r--drivers/crypto/ccp/ccp-debugfs.c344
-rw-r--r--drivers/crypto/ccp/ccp-dev-v5.c28
-rw-r--r--drivers/crypto/ccp/ccp-dev.c3
-rw-r--r--drivers/crypto/ccp/ccp-dev.h20
-rw-r--r--drivers/crypto/ccp/ccp-platform.c4
-rw-r--r--drivers/crypto/chelsio/chcr_algo.c1096
-rw-r--r--drivers/crypto/chelsio/chcr_algo.h30
-rw-r--r--drivers/crypto/chelsio/chcr_core.c56
-rw-r--r--drivers/crypto/chelsio/chcr_core.h5
-rw-r--r--drivers/crypto/chelsio/chcr_crypto.h25
-rw-r--r--drivers/crypto/img-hash.c12
-rw-r--r--drivers/crypto/inside-secure/Makefile2
-rw-r--r--drivers/crypto/inside-secure/safexcel.c926
-rw-r--r--drivers/crypto/inside-secure/safexcel.h574
-rw-r--r--drivers/crypto/inside-secure/safexcel_cipher.c561
-rw-r--r--drivers/crypto/inside-secure/safexcel_hash.c1052
-rw-r--r--drivers/crypto/inside-secure/safexcel_ring.c157
-rw-r--r--drivers/crypto/ixp4xx_crypto.c3
-rw-r--r--drivers/crypto/marvell/hash.c5
-rw-r--r--drivers/crypto/mediatek/mtk-platform.c11
-rw-r--r--drivers/crypto/mediatek/mtk-platform.h2
-rw-r--r--drivers/crypto/mediatek/mtk-sha.c5
-rw-r--r--drivers/crypto/mv_cesa.c5
-rw-r--r--drivers/crypto/n2_core.c4
-rw-r--r--drivers/crypto/omap-aes-gcm.c408
-rw-r--r--drivers/crypto/omap-aes.c461
-rw-r--r--drivers/crypto/omap-aes.h214
-rw-r--r--drivers/crypto/omap-crypto.c184
-rw-r--r--drivers/crypto/omap-crypto.h37
-rw-r--r--drivers/crypto/omap-des.c138
-rw-r--r--drivers/crypto/omap-sham.c38
-rw-r--r--drivers/crypto/qat/qat_common/adf_aer.c15
-rw-r--r--drivers/crypto/qat/qat_common/qat_algs.c5
-rw-r--r--drivers/crypto/qat/qat_common/qat_asym_algs.c8
-rw-r--r--drivers/crypto/sunxi-ss/sun4i-ss-cipher.c213
-rw-r--r--drivers/crypto/sunxi-ss/sun4i-ss-core.c237
-rw-r--r--drivers/crypto/sunxi-ss/sun4i-ss-hash.c138
-rw-r--r--drivers/crypto/sunxi-ss/sun4i-ss.h34
-rw-r--r--drivers/crypto/talitos.c7
-rw-r--r--drivers/crypto/vmx/aes.c7
-rw-r--r--drivers/crypto/vmx/aes_cbc.c7
-rw-r--r--drivers/crypto/vmx/aes_ctr.c7
-rw-r--r--drivers/crypto/vmx/aes_xts.c7
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4.h1
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c35
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c1
-rw-r--r--drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h10
-rw-r--r--include/crypto/akcipher.h11
-rw-r--r--include/crypto/dh.h4
-rw-r--r--include/crypto/ecdh.h4
-rw-r--r--include/crypto/engine.h1
-rw-r--r--include/crypto/hmac.h7
-rw-r--r--include/crypto/kpp.h15
-rw-r--r--include/linux/timeriomem-rng.h3
127 files changed, 12841 insertions, 1535 deletions
diff --git a/Documentation/crypto/api-samples.rst b/Documentation/crypto/api-samples.rst
index d021fd96a76d..2531948db89f 100644
--- a/Documentation/crypto/api-samples.rst
+++ b/Documentation/crypto/api-samples.rst
@@ -155,9 +155,9 @@ Code Example For Use of Operational State Memory With SHASH
char ctx[];
};
- static struct sdesc init_sdesc(struct crypto_shash *alg)
+ static struct sdesc *init_sdesc(struct crypto_shash *alg)
{
- struct sdesc sdesc;
+ struct sdesc *sdesc;
int size;
size = sizeof(struct shash_desc) + crypto_shash_descsize(alg);
@@ -169,15 +169,16 @@ Code Example For Use of Operational State Memory With SHASH
return sdesc;
}
- static int calc_hash(struct crypto_shashalg,
- const unsigned chardata, unsigned int datalen,
- unsigned chardigest) {
- struct sdesc sdesc;
+ static int calc_hash(struct crypto_shash *alg,
+ const unsigned char *data, unsigned int datalen,
+ unsigned char *digest)
+ {
+ struct sdesc *sdesc;
int ret;
sdesc = init_sdesc(alg);
if (IS_ERR(sdesc)) {
- pr_info("trusted_key: can't alloc %s\n", hash_alg);
+ pr_info("can't alloc sdesc\n");
return PTR_ERR(sdesc);
}
@@ -186,6 +187,23 @@ Code Example For Use of Operational State Memory With SHASH
return ret;
}
+ static int test_hash(const unsigned char *data, unsigned int datalen,
+ unsigned char *digest)
+ {
+ struct crypto_shash *alg;
+ char *hash_alg_name = "sha1-padlock-nano";
+ int ret;
+
+ alg = crypto_alloc_shash(hash_alg_name, CRYPTO_ALG_TYPE_SHASH, 0);
+ if (IS_ERR(alg)) {
+ pr_info("can't alloc alg %s\n", hash_alg_name);
+ return PTR_ERR(alg);
+ }
+ ret = calc_hash(alg, data, datalen, digest);
+ crypto_free_shash(alg);
+ return ret;
+ }
+
Code Example For Random Number Generator Usage
----------------------------------------------
@@ -195,8 +213,8 @@ Code Example For Random Number Generator Usage
static int get_random_numbers(u8 *buf, unsigned int len)
{
- struct crypto_rngrng = NULL;
- chardrbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */
+ struct crypto_rng *rng = NULL;
+ char *drbg = "drbg_nopr_sha256"; /* Hash DRBG with SHA-256, no PR */
int ret;
if (!buf || !len) {
@@ -207,7 +225,7 @@ Code Example For Random Number Generator Usage
rng = crypto_alloc_rng(drbg, 0, 0);
if (IS_ERR(rng)) {
pr_debug("could not allocate RNG handle for %s\n", drbg);
- return -PTR_ERR(rng);
+ return PTR_ERR(rng);
}