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authorIcenowy Zheng <icenowy@aosc.io>2018-07-22 20:54:07 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2018-08-01 12:02:03 +0200
commit88023d43ffe114d4f8c35995151ef6f8633f234a (patch)
tree48afd9425ab9d82c5c7dd655fc75ecfbd8cc6b38
parent29aba07aea0e36c996001ca3f8997316ebefe0e1 (diff)
mmc: sunxi: allow 3.3V DDR when DDR is available
Some Allwinner boards feature an on-board eMMC with fixed 3.3V voltage (e.g. Banana Pi M2+), and in this case both the eMMC and the SoC are capable of doing 3.3V DDR transmission. Add capability of 3.3V DDR when DDR is available (extra clock or new timing). Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sunxi-mmc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 8e7f3e35ee3d..4ea8e2611079 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1388,7 +1388,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
if (host->cfg->clk_delays || host->use_new_timings)
- mmc->caps |= MMC_CAP_1_8V_DDR;
+ mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
ret = mmc_of_parse(mmc);
if (ret)