diff options
| author | Thierry Reding <treding@nvidia.com> | 2020-06-11 19:59:25 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-06-25 09:29:46 +0200 |
| commit | eb6563a681e2fdf5e33a3ede03c8768059d3a8d3 (patch) | |
| tree | eded64bcf46a6ca84c918efecb57204e9e12a4a2 | |
| parent | 7fb099528bbe92157a5e2bdc94b6f5e0269f0dd6 (diff) | |
ARM: tegra: Add parent clock to DSI output
The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 899ec5a1e1f9..72a4211a618f 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -156,7 +156,9 @@ dsi@54300000 { compatible = "nvidia,tegra20-dsi"; reg = <0x54300000 0x00040000>; - clocks = <&tegra_car TEGRA20_CLK_DSI>; + clocks = <&tegra_car TEGRA20_CLK_DSI>, + <&tegra_car TEGRA20_CLK_PLL_D_OUT0>; + clock-names = "dsi", "parent"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 2007c603aba2..08d0ee4ad7c1 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -257,7 +257,9 @@ dsi@54300000 { compatible = "nvidia,tegra30-dsi"; reg = <0x54300000 0x00040000>; - clocks = <&tegra_car TEGRA30_CLK_DSIA>; + clocks = <&tegra_car TEGRA30_CLK_DSIA>, + <&tegra_car TEGRA30_CLK_PLL_D_OUT0>; + clock-names = "dsi", "parent"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; |