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authorCarl Huang <cjhuang@codeaurora.org>2020-12-10 16:05:23 +0200
committerKalle Valo <kvalo@codeaurora.org>2020-12-12 06:40:20 +0200
commit0ccdf43988279eed70dece82ffff08fb15278d2c (patch)
treecf34cee3d61af50990798e745d4fd6a9b19837d6
parent0699940755e93fc307328523d58c15b8f42e5fe2 (diff)
ath11k: pci: disable VDD4BLOW
It's recommended to disable VDD4BLOW during initialisation. Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1 Signed-off-by: Carl Huang <cjhuang@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/1607609124-17250-6-git-send-email-kvalo@codeaurora.org
-rw-r--r--drivers/net/wireless/ath/ath11k/pci.c10
-rw-r--r--drivers/net/wireless/ath/ath11k/pci.h3
2 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c
index 064c35052697..818e37c32a85 100644
--- a/drivers/net/wireless/ath/ath11k/pci.c
+++ b/drivers/net/wireless/ath/ath11k/pci.c
@@ -346,6 +346,15 @@ static void ath11k_pci_clear_all_intrs(struct ath11k_base *ab)
ath11k_pci_write32(ab, PCIE_PCIE_INT_ALL_CLEAR, PCIE_INT_CLEAR_ALL);
}
+static void ath11k_pci_set_wlaon_pwr_ctrl(struct ath11k_base *ab)
+{
+ u32 val;
+
+ val = ath11k_pci_read32(ab, WLAON_QFPROM_PWR_CTRL_REG);
+ val &= ~QFPROM_PWR_CTRL_VDD4BLOW_MASK;
+ ath11k_pci_write32(ab, WLAON_QFPROM_PWR_CTRL_REG, val);
+}
+
static void ath11k_pci_force_wake(struct ath11k_base *ab)
{
ath11k_pci_write32(ab, PCIE_SOC_WAKE_PCIE_LOCAL_REG, 1);
@@ -357,6 +366,7 @@ static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
if (power_on) {
ath11k_pci_enable_ltssm(ab);
ath11k_pci_clear_all_intrs(ab);
+ ath11k_pci_set_wlaon_pwr_ctrl(ab);
ath11k_pci_fix_l1ss(ab);
}
diff --git a/drivers/net/wireless/ath/ath11k/pci.h b/drivers/net/wireless/ath/ath11k/pci.h
index 6e7cc8904c3d..0432a702416b 100644
--- a/drivers/net/wireless/ath/ath11k/pci.h
+++ b/drivers/net/wireless/ath/ath11k/pci.h
@@ -45,6 +45,9 @@
#define PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG4_VAL 0xff
#define PCIE_USB3_PCS_MISC_OSC_DTCT_CONFIG_MSK 0x000000ff
+#define WLAON_QFPROM_PWR_CTRL_REG 0x01f8031c
+#define QFPROM_PWR_CTRL_VDD4BLOW_MASK 0x4
+
struct ath11k_msi_user {
char *name;
int num_vectors;