#! /usr/bin/env perl # Author: Min Zhou # Copyright 2023 The OpenSSL Project Authors. All Rights Reserved. # # Licensed under the OpenSSL license (the "License"). You may not use # this file except in compliance with the License. You can obtain a copy # in the file LICENSE in the source distribution or at # https://www.openssl.org/source/license.html use strict; my $code; # Here is the scalar register layout for LoongArch. my ($zero,$ra,$tp,$sp,$fp)=map("\$r$_",(0..3,22)); my ($a0,$a1,$a2,$a3,$a4,$a5,$a6,$a7)=map("\$r$_",(4..11)); my ($t0,$t1,$t2,$t3,$t4,$t5,$t6,$t7,$t8,$x)=map("\$r$_",(12..21)); my ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8)=map("\$r$_",(23..31)); # The saved floating-point registers in the LP64D ABI. In LoongArch # with vector extension, the low 64 bits of a vector register alias with # the corresponding FPR. So we must save and restore the corresponding # FPR if we'll write into a vector register. The ABI only requires # saving and restoring the FPR (i.e. 64 bits of the corresponding vector # register), not the entire vector register. my ($fs0,$fs1,$fs2,$fs3,$fs4,$fs5,$fs6,$fs7)=map("\$f$_",(24..31)); # Here is the 128-bit vector register layout for LSX extension. my ($vr0,$vr1,$vr2,$vr3,$vr4,$vr5,$vr6,$vr7,$vr8,$vr9,$vr10, $vr11,$vr12,$vr13,$vr14,$vr15,$vr16,$vr17,$vr18,$vr19, $vr20,$vr21,$vr22,$vr23,$vr24,$vr25,$vr26,$vr27,$vr28, $vr29,$vr30,$vr31)=map("\$vr$_",(0..31)); # Here is the 256-bit vector register layout for LASX extension. my ($xr0,$xr1,$xr2,$xr3,$xr4,$xr5,$xr6,$xr7,$xr8,$xr9,$xr10, $xr11,$xr12,$xr13,$xr14,$xr15,$xr16,$xr17,$xr18,$xr19, $xr20,$xr21,$xr22,$xr23,$xr24,$xr25,$xr26,$xr27,$xr28, $xr29,$xr30,$xr31)=map("\$xr$_",(0..31)); my $output; for (@ARGV) { $output=$_ if (/\w[\w\-]*\.\w+$/); } open STDOUT,">$output"; # Input parameter block my ($out, $inp, $len, $key, $counter) = ($a0, $a1, $a2, $a3, $a4); $code .= <