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2023-10-20rand: add callbacks to cleanup the user entropy resp. nonceMatthias St. Pierre
The `get_user_{entropy,nonce}` callbacks were add recently to the dispatch table in commit 4cde7585ce8e. Instead of adding corresponding `cleanup_user_{entropy,nonce}` callbacks, the `cleanup_{entropy,nonce}` callbacks were reused. This can cause a problem in the case where the seed source is replaced by a provider: the buffer gets allocated by the provider but cleared by the core. Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/22423) (cherry picked from commit 5516d20226c496c2b22fa741698b4d48dad0428f)
2023-10-03rand: add extra error codePauli
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/22210)
2023-10-03Fix a mem leak when the FIPS provider is used in a different threadMatt Caswell
We were neglecting to register the main thread to receive thread stop notifications. This is important if the thread that starts the FIPS provider is not the same one that is used when OPENSSL_cleanup() is called. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/22210)
2023-10-03fips: use seed source requestedPauli
Fixes #21909 Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/22210)
2023-10-03fips selftest: avoid relying on a real RNG for self testsPauli
Rather than instantiate the private and primary DRBGs during the selftest, instead use a test RNG. This leaves the DRBG setup pristine and permits later replacement of the seed source despite the very early running power up self tests. Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/22210)
2023-07-28vpaes: LoongArch: Use getauxval(AT_HWCAP) for LSX detectionXi Ruoyao
Running LSX instructions requires both the hardware support and the kernel support. The `cpucfg` instruction only tests the hardware support, causing a SIGILL if the hardware supports LSX but the kernel does not. Use `getauxval(AT_HWCAP)` as the ["Software Development and Build Convention for LoongArch Architectures"][1] manual suggests. The LOONGARCH_HWCAP_LSX and LOONGARCH_HWCAP_LASX bits are copied from the manual too. In Glibc 2.38 they'll be provided by <sys/auxv.h> as well, but they are unavailable in earlier Glibc versions so we cannot rely on it. The getauxval syscall and Glibc wrapper are available since day one (Linux-5.19 and Glibc-2.36) for LoongArch. Fixes #21508. [1]:https://github.com/loongson/la-softdev-convention/blob/master/la-softdev-convention.adoc#kernel-constraints Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21509) (cherry picked from commit c612289b77c37f7295d5af0d0e6b6c04e6ba727c)
2023-07-24fix: reject adding a duplicity into STACK_OF(X509_ATTRIBUTE)Adam Šulc
Function `X509at_add1_attr()` (crypto/x509/x509_att.c) rejects to add a duplicity into `*x` but it searches in a wrong stack. Changed to search in `*x`. CLA: trivial Reviewed-by: Kurt Roeckx <kurt@roeckx.be> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/21505) (cherry picked from commit 7551264186f176ca5801aa84d60c7b91d8fba31f)
2023-05-30Update copyright yearTomas Mraz
Reviewed-by: Richard Levitte <levitte@openssl.org> Release: yes
2023-05-12CMP client: fix error response on -csr without private key, also in docsDr. David von Oheimb
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Todd Short <todd.short@me.com> Reviewed-by: David von Oheimb <david.von.oheimb@siemens.com> (Merged from https://github.com/openssl/openssl/pull/20832) (cherry picked from commit 2d6585986f3b754750b25e7a296a08e7129a5320)
2023-04-04Revert "Fix Timing Oracle in RSA decryption"Bernd Edlinger
This reverts commit 8022a4799fe884b3bf8d538e2b4c4ec323663118. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20282)
2023-03-29SM4 check should be for __aarch64__, not __ARM_MAX_ARCH__ >= 8Tom Cosgrove
(And then __arm__ and __arm tests are redundant) Fixes #20604 for 3.1 branch Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20624)
2023-03-22Do not build P10-specific AES-GCM assembler on macOSEvan Miller
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20543) (cherry picked from commit 175645a1a695017a312155a2c1d864ad8bff4eaa)
2023-03-14Update copyright yearMatt Caswell
Reviewed-by: Tomas Mraz <tomas@openssl.org> Release: yes (Merged from https://github.com/openssl/openssl/pull/20508)
2023-03-01Fix potential infinite loops in ECDSA signing.slontis
Similiar checks to the DSA code have been added for ECDSA also. This should not be a problem when using named groups. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20384) (cherry picked from commit 5f820bd7535b871fdfdc0303c3af23ba4be901f0)
2023-03-01Fix infinite loops in DSA sign code.slontis
Fixes #20268 Values such as q=1 or priv=0 caused infinite loops when calling DSA_sign() without these changes. There are other cases where bad domain parameters may have caused infinite loops where the retry counter has been added. The simpler case of priv=0 also hits this case. q=1 caused an infinite loop in the setup. The max retry value has been set to an arbitrary value of 8 (it is unlikely to ever do a single retry for valid values). The minimum q bits was set to an arbitrary value of 128 (160 is still used for legacy reasons when using 512 bit keys). Thanks @guidovranken for detecting this, and @davidben for his insightful analysis. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20384) (cherry picked from commit 3a4e09ab42654b3d223f0f8dd1a9c58b2902ddcc)
2023-02-08Fix the return values of the aarch64 unroll8_eor_aes_gcm_*_*_kernel functionsTom Cosgrove
These aren't currently checked when they are called in cipher_aes_gcm_hw_armv8.inc, but they are declared as returning as size_t the number of bytes they have processed, and the aes_gcm_*_*_kernel (unroll by 4) versions of these do return the correct values. Change-Id: Ic3eaf139e36e29e8779b5bd8b867c08fde37a337 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/20191) (cherry picked from commit 4596c20b86871b2bb0f9a7f6b855c0b7f0d4fbf3)
2023-02-08Internaly declare the DSA type for no-deprecated buildsTomas Mraz
Reviewed-by: Hugo Landau <hlandau@openssl.org> Reviewed-by: Richard Levitte <levitte@openssl.org> (cherry picked from commit 7a21a1b5fa2dac438892cf3292d1f9c445d870d9) (cherry picked from commit 2ad9928170768653d19d81881deabc5f9c1665c0)
2023-02-07Do not create DSA keys without parameters by decoderTomas Mraz
Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org>
2023-02-07Fix Timing Oracle in RSA decryptionDmitry Belyavskiy
A timing based side channel exists in the OpenSSL RSA Decryption implementation which could be sufficient to recover a plaintext across a network in a Bleichenbacher style attack. To achieve a successful decryption an attacker would have to be able to send a very large number of trial messages for decryption. The vulnerability affects all RSA padding modes: PKCS#1 v1.5, RSA-OEAP and RSASVE. Patch written by Dmitry Belyavsky and Hubert Kario CVE-2022-4304 Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org>
2022-12-14Do not build P10-specific AES-GCM assembler on AIXTomas Mraz
Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Matt Caswell <matt@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19865)
2022-12-01Update copyright yearTomas Mraz
Reviewed-by: Matt Caswell <matt@openssl.org> Release: yes (Merged from https://github.com/openssl/openssl/pull/19803)
2022-11-23Add vpaes-loongarch64.pl module.zhuchen
Add 128 bit lsx vector expansion optimization code of Loongarch64 architecture to AES. The test result on the 3A5000 improves performance by about 40%~50%. Signed-off-by: zhuchen <zhuchen@loongson.cn> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19364) (cherry picked from commit ef917549f5867d269d359155ff67b8ccb5e66a76)
2022-11-23Fix AES-GCM on Power 8 CPUsTomas Mraz
Properly fallback to the default implementation on CPUs missing necessary instructions. Fixes #19163 Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19182) (cherry picked from commit 9ab6b64ac856157a31a54c0d12207c2338bfa8e2)
2022-11-23aes_platform: add riscv32 zkn asm supportHongren (Zenithal) Zheng
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18308) (cherry picked from commit cbb15b31b98f47276cf9e87453831d96274baf66)
2022-11-23Use separate function to get GCM functionsTodd Short
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18835) (cherry picked from commit 92c9086e5c2b63606cd28a7f13f09b9ff35a0de3)
2022-11-23Remove unused 1bit GCM implementationTodd Short
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18835) (cherry picked from commit 7b6e19fc4e6cc1a7000f71789ef50636dacdbb85)
2022-11-23Remove unused 8bit GCM implementationTodd Short
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18835) (cherry picked from commit a8b5128fd724bc23f7454d64e401d15129634a01)
2022-11-23Emit rev8 on __riscv_zbkb as on __riscv_zbbmarcfedorow
Also add early clobber for two-insn bswap. Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Hugo Landau <hlandau@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18827) (cherry picked from commit 48b6776678d794406c625dcb5767102b73081962)
2022-11-23Improve FIPS RSA keygen performance.slontis
Reduce the Miller Rabin counts to the values specified by FIPS 186-5. The old code was using a fixed value of 64. Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19579) (cherry picked from commit d2f6e66d2837bff1f5f7636bb2118e3a45c9df61)
2022-11-22Release the drbg in the global default context before enginesTomas Mraz
Fixes #17995 Fixes #18578 Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> (Merged from https://github.com/openssl/openssl/pull/19386) (cherry picked from commit a88e97fcace01ecf557b207f04328a72df5110df)
2022-11-21Add ROTATE inline asm support for SM3Hongren (Zenithal) Zheng
And move ROTATE inline asm to header. Now this benefits SM3, SHA (when with Zbb only and no Zknh) and other hash functions Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18287) (cherry picked from commit eea820f3e239a4c11d618741fd5d00a6bc877347)
2022-11-21aes_platform: add riscv64 zkn asm supportHongren (Zenithal) Zheng
Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18197) (cherry picked from commit 77d29ff041edcdc6a3d33251d6270a4cfe0be9b3)
2022-11-21Add riscv scalar crypto extension capabilityHongren (Zenithal) Zheng
Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18197) (cherry picked from commit d5dd608364074fadbf4776142ccd8c7b268845cc)
2022-11-21Add BSWAP4/BSWAP8 routines for riscv64 with ZbbHenry Brausen
These routines make use of the rev8 instruction in the Zbb extension to accelerate byte-swapping when OpenSSL is built specifically for a machine that supports Zbb. Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Henry Brausen <henry.brausen@vrull.eu> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17640) (cherry picked from commit e4fd3fc379d76d9cd33ea6699268485606447737)
2022-11-21Add basic RISC-V cpuid and OPENSSL_riscvcapHenry Brausen
RISC-V cpuid implementation allows bitmanip extensions Zb[abcs] to be enabled at runtime using OPENSSL_riscvcap environment variable. For example, to specify 64-bit RISC-V with the G,C,Zba,Zbb,Zbc extensions, one could write: OPENSSL_riscvcap="rv64gc_zba_zbb_zbc" Architecture string parsing is still very primitive, but can be expanded in the future. Currently, only bitmanip extensions Zba, Zbb, Zbc and Zbs are supported. Includes implementation of constant-time CRYPTO_memcmp in riscv64 asm, as well as OPENSSL_cleanse. Assembly implementations are written using perlasm. Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Henry Brausen <henry.brausen@vrull.eu> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17640) (cherry picked from commit 360f6dcc5aa1a86ec3ff9a94612b88e3d960ee2e)
2022-11-21Remove the _fetch_by_number functionsPauli
These functions are unused and untested. They are also implemented rather inefficiently. If we ever needed them in the future, they'd almost surely need to be rewritten more efficiently. Fixes #18227 Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18237) (cherry picked from commit 16ff70a58cfb5c40197e6a940cf4666226f31b79)
2022-11-21evp_md_init_internal: Avoid reallocating algctx if digest unchangedTomas Mraz
Fixes #16947 Also refactor out algctx freeing into a separate function. Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> Reviewed-by: Ben Kaduk <kaduk@mit.edu> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/18105) (cherry picked from commit fe5c5cb85197aec7d68ab095b866ed22076850d0)
2022-11-21SM4 optimization for ARM by ASIMDDaniel Hu
This patch optimizes SM4 for ARM processor using ASIMD instruction It will improve performance if both of following conditions are met: 1) Input data equal to or more than 4 blocks 2) Cipher mode allows parallelism, including ECB,CTR,GCM or CBC decryption This patch implements SM4 SBOX lookup in vector registers, with the benefit of constant processing time over existing C implementation. It is only enabled for micro-architecture N1/V1. In the ideal scenario, performance can reach up to 2.7X When either of above two conditions is not met, e.g. single block input or CFB/OFB mode, CBC encryption, performance could drop about 50%. The assembly code has been reviewed internally by ARM engineer Fangming.Fang@arm.com Signed-off-by: Daniel Hu <Daniel.Hu@arm.com> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17951) (cherry picked from commit 4908787f21f4f5fa24b721ed3ebbc4d3e93ef70c)
2022-11-21Refactor OSSL_LIB_CTX to avoid using CRYPTO_EX_DATAHugo Landau
This refactors OSSL_LIB_CTX to avoid using CRYPTO_EX_DATA. The assorted objects to be managed by OSSL_LIB_CTX are hardcoded and are initialized eagerly rather than lazily, which avoids the need for locking on access in most cases. Fixes #17116. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17881) (cherry picked from commit 927d0566ded0dff9d6c5abc8a40bb84068446b76)
2022-11-15Propagate selection all the way on key exportSimo Sorce
EVP_PKEY_eq() is used to check, among other things, if a certificate public key corresponds to a private key. When the private key belongs to a provider that does not allow to export private keys this currently fails as the internal functions used to import/export keys ignored the selection given (which specifies that only the public key needs to be considered) and instead tries to export everything. This patch allows to propagate the selection all the way down including adding it in the cache so that a following operation actually looking for other selection parameters does not mistakenly pick up an export containing only partial information. Signed-off-by: Simo Sorce <simo@redhat.com> Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/19648) (cherry picked from commit 98642df4ba886818900ab7e6b23703544e6addd4)
2022-11-11chacha20 performance optimizations for ppc64le with 8x lanes,Deepankar Bhattacharjee
Performance increase around 50%. Co-authored-by: Madhusudhanan Duraisamy <madurais@in.ibm.com> Co-authored-by: Nilamjyoti Goswami <nilamgoswami@in.ibm.com> Co-authored-by: Siva Sundar Anbareeswaran <srisivasundar@in.ibm.com> Reviewed-by: Danny Tsen <dtsen@us.ibm.com> Tested-by: Danny Tsen <dtsen@us.ibm.com> Signed-off-by: Danny <dtsen@us.ibm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/16637) (cherry picked from commit f596bbe4da779b56eea34d96168b557d78e1149a)
2022-11-11AES-GCM enabled with AVX512 vAES and vPCLMULQDQ.Andrey Matyukov
Vectorized 'stitched' encrypt + ghash implementation of AES-GCM enabled with AVX512 vAES and vPCLMULQDQ instructions (available starting Intel's IceLake micro-architecture). The performance details for representative IceLake Server and Client platforms are shown below Performance data: OpenSSL Speed KBs/Sec Intel(R) Xeon(R) Platinum 8380 CPU @ 2.30GHz (1Core/1Thread) Payload in Bytes 16 64 256 1024 8192 16384 AES-128-GCM Baseline 478708.27 1118296.96 2428092.52 3518199.4 4172355.99 4235762.07 Patched 534613.95 2009345.55 3775588.15 5059517.64 8476794.88 8941541.79 Speedup 1.12 1.80 1.55 1.44 2.03 2.11 AES-256-GCM Baseline 399237.27 961699.9 2136377.65 2979889.15 3554823.37 3617757.5 Patched 475948.13 1720128.51 3462407.12 4696832.2 7532013.16 7924953.91 Speedup 1.19 1.79 1.62 1.58 2.12 2.19 Intel(R) Core(TM) i7-1065G7 CPU @ 1.30GHz (1Core/1Thread) Payload in Bytes 16 64 256 1024 8192 16384 AES-128-GCM Baseline 259128.54 570756.43 1362554.16 1990654.57 2359128.88 2401671.58 Patched 292139.47 1079320.95 2001974.63 2829007.46 4510318.59 4705314.41 Speedup 1.13 1.89 1.47 1.42 1.91 1.96 AES-256-GCM Baseline 236000.34 550506.76 1234638.08 1716734.57 2011255.6 2028099.99 Patched 247256.32 919731.34 1773270.43 2553239.55 3953115.14 4111227.29 Speedup 1.05 1.67 1.44 1.49 1.97 2.03 Reviewed-by: TJ O'Dwyer, Marcel Cornu, Pablo de Lara Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17239) (cherry picked from commit 63b996e752ac698186c38177232280e6515d571b)
2022-11-11Fixed counter overflowDanny Tsen
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17607) (cherry picked from commit 345c99b6654b8313c792d54f829943068911ddbd)
2022-11-11Optimize AES-GCM for uarchs with unroll and new instructionsXiaokangQian
Increase the block numbers to 8 for every iteration. Increase the hash table capacity. Make use of EOR3 instruction to improve the performance. This can improve performance 25-40% on out-of-order microarchitectures with a large number of fast execution units, such as Neoverse V1. We also see 20-30% performance improvements on other architectures such as the M1. Assembly code reviewd by Tom Cosgrove (ARM). Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/15916) (cherry picked from commit 954f45ba4c504570206ff5bed811e512cf92dc8e)
2022-11-11AES-GCM performance optimzation with stitched method for p9+ ppc64leDanny Tsen
Assembly code reviewed by Shricharan Srivatsan <ssrivat@us.ibm.com> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/16854) (cherry picked from commit 44a563dde1584cd9284e80b6e45ee5019be8d36c)
2022-11-11fuzz: add punycode decoder fuzz testPauli
Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> (Merged from https://github.com/openssl/openssl/pull/19591) (cherry picked from commit 8aa82b337081b7a22c35dddad8d62fb1ca9ea884)
2022-11-11punycode: update to use WPACKET instead of using custom range checkingPauli
Add test for `.' overflows, remove the output size argument from ossl_a2ulabel() since it was never used and greatly complicated the code. Convert ossl_a2ulabel() to use WPACKET for building the output string. Update the documentation to match the new definition of ossl_a2ulabel(). x509: let punycode handle the '\0' string termination. Saves a memset(3) and some size fiddling. Also update to deal with the modified parameters. Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Dmitry Belyavskiy <beldmit@gmail.com> (Merged from https://github.com/openssl/openssl/pull/19591) (cherry picked from commit 905ba924398f474e647de70345b4ae4089fedba7)
2022-11-09SM4 optimization for ARM by HW instructionDaniel Hu
This patch implements the SM4 optimization for ARM processor, using SM4 HW instruction, which is an optional feature of crypto extension for aarch64 V8. Tested on some modern ARM micro-architectures with SM4 support, the performance uplift can be observed around 8X~40X over existing C implementation in openssl. Algorithms that can be parallelized (like CTR, ECB, CBC decryption) are on higher end, with algorithm like CBC encryption on lower end (due to inter-block dependency) Perf data on Yitian-710 2.75GHz hardware, before and after optimization: Before: type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes SM4-CTR 105787.80k 107837.87k 108380.84k 108462.08k 108549.46k 108554.92k SM4-ECB 111924.58k 118173.76k 119776.00k 120093.70k 120264.02k 120274.94k SM4-CBC 106428.09k 109190.98k 109674.33k 109774.51k 109827.41k 109827.41k After (7.4x - 36.6x faster): type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes 16384 bytes SM4-CTR 781979.02k 2432994.28k 3437753.86k 3834177.88k 3963715.58k 3974556.33k SM4-ECB 937590.69k 2941689.02k 3945751.81k 4328655.87k 4459181.40k 4468692.31k SM4-CBC 890639.88k 1027746.58k 1050621.78k 1056696.66k 1058613.93k 1058701.31k Signed-off-by: Daniel Hu <Daniel.Hu@arm.com> Reviewed-by: Paul Dale <pauli@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17455) (cherry picked from commit 15b7175f558bf9eb057ec3266685486f727dd70f)
2022-11-09err: add additional errorsPauli
Reviewed-by: Richard Levitte <levitte@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17440) (cherry picked from commit 826da1451b2525b70f93fcc57ed5dbab61a19591) Reviewed-by: Hugo Landau <hlandau@openssl.org>
2022-10-11Update copyright yearMatt Caswell
Reviewed-by: Richard Levitte <levitte@openssl.org> Release: yes (Merged from https://github.com/openssl/openssl/pull/19382)
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