diff options
| author | JeffZhao <jeffzhao@zhaoxin.com> | 2018-03-16 14:15:16 +0800 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2018-03-19 11:47:33 +0100 |
| commit | 51cf8ba038aae10df9895b0001715938f7ad0c75 (patch) | |
| tree | fbaf90d1479545cdaf21c673e8128ec3798527cb /engines/asm/e_padlock-x86_64.pl | |
| parent | ec4c389108c2c5bcd96cf4125ec2f715523dab7b (diff) | |
engines/asm/e_padlock*: add support for Zhaoxin's x86 platform
VIA and Shanghai United Investment Co.,Ltd. found Shanghai ZhaoXin,
which is a fabless x86 CPU IC design company. ZhaoXin has issued
ZX-C, ZX-D x86 processors, which have 'Shanghai' CPU vendor id.
Reviewed-by: Andy Polyakov <appro@openssl.org>
Reviewed-by: Matt Caswell <matt@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/5640)
Diffstat (limited to 'engines/asm/e_padlock-x86_64.pl')
| -rw-r--r-- | engines/asm/e_padlock-x86_64.pl | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/engines/asm/e_padlock-x86_64.pl b/engines/asm/e_padlock-x86_64.pl index 834b1ea79c..9eff881e66 100644 --- a/engines/asm/e_padlock-x86_64.pl +++ b/engines/asm/e_padlock-x86_64.pl @@ -57,11 +57,20 @@ padlock_capability: cpuid xor %eax,%eax cmp \$`"0x".unpack("H*",'tneC')`,%ebx - jne .Lnoluck + jne .Lzhaoxin cmp \$`"0x".unpack("H*",'Hrua')`,%edx jne .Lnoluck cmp \$`"0x".unpack("H*",'slua')`,%ecx jne .Lnoluck + jmp .LzhaoxinEnd +.Lzhaoxin: + cmp \$`"0x".unpack("H*",'hS ')`,%ebx + jne .Lnoluck + cmp \$`"0x".unpack("H*",'hgna')`,%edx + jne .Lnoluck + cmp \$`"0x".unpack("H*",' ia')`,%ecx + jne .Lnoluck +.LzhaoxinEnd: mov \$0xC0000000,%eax cpuid mov %eax,%edx |