diff options
| author | Andy Polyakov <appro@openssl.org> | 2016-04-19 13:08:47 +0200 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2016-04-20 09:57:37 +0200 |
| commit | 4400f6c61e586dde2aea8dd023c9d4573fbbc547 (patch) | |
| tree | 96fa1cd9cce70fa7ea2227491576fad529d20f9f /crypto | |
| parent | fb65020b37d606659f90aa62163220b72d5560f5 (diff) | |
sparcv9cap.c: add Fujitsu SPARC64 X AES capability detection.
Reviewed-by: Richard Levitte <levitte@openssl.org>
Diffstat (limited to 'crypto')
| -rw-r--r-- | crypto/sparc_arch.h | 1 | ||||
| -rw-r--r-- | crypto/sparccpuid.S | 8 | ||||
| -rw-r--r-- | crypto/sparcv9cap.c | 16 |
3 files changed, 20 insertions, 5 deletions
diff --git a/crypto/sparc_arch.h b/crypto/sparc_arch.h index e30d322a4a..6f8969fc25 100644 --- a/crypto/sparc_arch.h +++ b/crypto/sparc_arch.h @@ -10,6 +10,7 @@ # define SPARCV9_VIS3 (1<<6) # define SPARCV9_RANDOM (1<<7) # define SPARCV9_64BIT_STACK (1<<8) +# define SPARCV9_FJAESX (1<<9)/* Fujitsu SPARC64 X AES */ /* * OPENSSL_sparcv9cap_P[1] is copy of Compatibility Feature Register, diff --git a/crypto/sparccpuid.S b/crypto/sparccpuid.S index 72c7adfc74..6f1dded8e2 100644 --- a/crypto/sparccpuid.S +++ b/crypto/sparccpuid.S @@ -349,6 +349,14 @@ _sparcv9_random: .type _sparcv9_random,#function .size _sparcv9_random,.-_sparcv9_vis3_probe +.global _sparcv9_fjaesx_probe +.align 8 +_sparcv9_fjaesx_probe: + .word 0x81b09206 !faesencx %f2,%f6,%f0 + retl + nop +.size _sparcv9_fjaesx_probe,.-_sparcv9_fjaesx_probe + .global OPENSSL_cleanse .align 32 OPENSSL_cleanse: diff --git a/crypto/sparcv9cap.c b/crypto/sparcv9cap.c index 2058640377..e1e6d73955 100644 --- a/crypto/sparcv9cap.c +++ b/crypto/sparcv9cap.c @@ -149,11 +149,12 @@ void OPENSSL_cpuid_setup(void) unsigned int vec[1]; if (getisax (vec,1)) { - if (vec[0]&0x0020) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS1; - if (vec[0]&0x0040) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS2; - if (vec[0]&0x0080) OPENSSL_sparcv9cap_P[0] |= SPARCV9_BLK; - if (vec[0]&0x0100) OPENSSL_sparcv9cap_P[0] |= SPARCV9_FMADD; - if (vec[0]&0x0400) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS3; + if (vec[0]&0x0020) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS1; + if (vec[0]&0x0040) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS2; + if (vec[0]&0x0080) OPENSSL_sparcv9cap_P[0] |= SPARCV9_BLK; + if (vec[0]&0x0100) OPENSSL_sparcv9cap_P[0] |= SPARCV9_FMADD; + if (vec[0]&0x0400) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS3; + if (vec[0]&0x10000) OPENSSL_sparcv9cap_P[0] |= SPARCV9_FJAESX; /* reconstruct %cfr copy */ OPENSSL_sparcv9cap_P[1] = (vec[0]>>17)&0x3ff; @@ -233,6 +234,11 @@ void OPENSSL_cpuid_setup(void) OPENSSL_sparcv9cap_P[0] |= SPARCV9_VIS3; } + if (sigsetjmp(common_jmp, 1) == 0) { + _sparcv9_fjaesx_probe(); + OPENSSL_sparcv9cap_P[0] |= SPARCV9_FJAESX; + } + /* * In wait for better solution _sparcv9_rdcfr is masked by * VIS3 flag, because it goes to uninterruptable endless |