diff options
| author | Andy Polyakov <appro@openssl.org> | 2011-05-29 12:50:02 +0000 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2011-05-29 12:50:02 +0000 |
| commit | 18f5603c5333744ddbe55c963ffd88bb3f59b0d7 (patch) | |
| tree | 0889eb136e8db5bcd04171cc7b2340b78c0345ba /crypto/x86cpuid.pl | |
| parent | 0c149802a299ec7f448278ed90e53ac6c2dac88e (diff) | |
x86cpuid.pl: last commit broke platforms with perl with 64-bit integer.
Diffstat (limited to 'crypto/x86cpuid.pl')
| -rw-r--r-- | crypto/x86cpuid.pl | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/crypto/x86cpuid.pl b/crypto/x86cpuid.pl index 716f44da92..70c8a2d671 100644 --- a/crypto/x86cpuid.pl +++ b/crypto/x86cpuid.pl @@ -92,7 +92,7 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); } &set_label("nocacheinfo"); &mov ("eax",1); &cpuid (); - &and ("edx",~(1<<20|1<<30)); # force reserved bits to 0 + &and ("edx",0xbfefffff); # force reserved bits #20, #30 to 0 &cmp ("ebp",0); &jne (&label("notintel")); &or ("edx",1<<30); # set reserved bit#30 on Intel CPUs @@ -115,7 +115,7 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); } &set_label("generic"); &and ("ebp",1<<11); # isolate AMD XOP flag - &and ("ecx",~(1<<11)); + &and ("ecx",0xfffff7ff); # force 11th bit to 0 &mov ("esi","edx"); &or ("ebp","ecx"); # merge AMD XOP flag @@ -131,10 +131,10 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); } &cmp ("eax",2); &je (&label("clear_avx")); &set_label("clear_xmm"); - &and ("ebp",~(1<<25|1<<1)); # clear AESNI and PCLMULQDQ bits - &and ("esi",~(1<<24)); # clear FXSR + &and ("ebp",0xfdfffffd); # clear AESNI and PCLMULQDQ bits + &and ("esi",0xfeffffff); # clear FXSR &set_label("clear_avx"); - &and ("ebp",~(1<<28|1<<12|1<<11));# clear AVX, FMA and AMD XOP bits + &and ("ebp",0xefffe7ff); # clear AVX, FMA and AMD XOP bits &set_label("done"); &mov ("eax","esi"); &mov ("edx","ebp"); |