diff options
| author | Andy Polyakov <appro@openssl.org> | 2017-03-05 20:38:36 +0100 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2017-03-07 11:19:20 +0100 |
| commit | c6e4fdbf8b44010ba12b72d519e437bbd2da71e6 (patch) | |
| tree | 40d47f58b30dcef14e54eb7fbad46d91f908d812 /crypto/x86_64cpuid.pl | |
| parent | bf1c92faf6d3adba62165432164f5732da3d99c9 (diff) | |
crypto/x86_64cpuid.pl: move extended feature detection upwards.
Exteneded feature flags were not pulled on AMD processors, as result a
number of extensions were effectively masked on Ryzen. It should have
been reported for Excavator since it implements AVX2 extension, but
apparently nobody noticed or cared...
Reviewed-by: Rich Salz <rsalz@openssl.org>
(cherry picked from commit f8418d87e191e46b81e1b9548326ab2876fa0907)
Diffstat (limited to 'crypto/x86_64cpuid.pl')
| -rw-r--r-- | crypto/x86_64cpuid.pl | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/crypto/x86_64cpuid.pl b/crypto/x86_64cpuid.pl index 6cb152148b..21d48ee6f9 100644 --- a/crypto/x86_64cpuid.pl +++ b/crypto/x86_64cpuid.pl @@ -70,6 +70,16 @@ OPENSSL_ia32_cpuid: cpuid mov %eax,%r11d # max value for standard query level + cmp \$7,%eax + jb .Lno_extended_info + + mov \$7,%eax + xor %ecx,%ecx + cpuid + mov %ebx,8(%rdi) + +.Lno_extended_info: + xor %eax,%eax cmp \$0x756e6547,%ebx # "Genu" setne %al @@ -134,14 +144,6 @@ OPENSSL_ia32_cpuid: shr \$14,%r10d and \$0xfff,%r10d # number of cores -1 per L1D - cmp \$7,%r11d - jb .Lnocacheinfo - - mov \$7,%eax - xor %ecx,%ecx - cpuid - mov %ebx,8(%rdi) - .Lnocacheinfo: mov \$1,%eax cpuid |