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authorAndy Polyakov <appro@openssl.org>2007-09-13 07:27:10 +0000
committerAndy Polyakov <appro@openssl.org>2007-09-13 07:27:10 +0000
commit399f94bfb45c993d7e08d604532d1dc72dc944a4 (patch)
tree6367064780fabe04693545dc0f4d9e66297a0fdd /crypto/sha
parent1fa29843fa2f23d01b7896b667e44fd60ed6d9ce (diff)
Commentary updates.
Diffstat (limited to 'crypto/sha')
-rwxr-xr-xcrypto/sha/asm/sha1-ppc.pl1
-rwxr-xr-xcrypto/sha/asm/sha1-x86_64.pl2
-rw-r--r--crypto/sha/asm/sha256-armv4.pl8
-rwxr-xr-xcrypto/sha/asm/sha512-ppc.pl1
-rw-r--r--crypto/sha/asm/sha512-s390x.pl2
5 files changed, 9 insertions, 5 deletions
diff --git a/crypto/sha/asm/sha1-ppc.pl b/crypto/sha/asm/sha1-ppc.pl
index fbd051652c..2c84d59149 100755
--- a/crypto/sha/asm/sha1-ppc.pl
+++ b/crypto/sha/asm/sha1-ppc.pl
@@ -18,6 +18,7 @@
# -m64 -m32
# ----------------------------------
# PPC970,gcc-4.0.0 +76% +59%
+# Power6,xlc-7 +68% +33%
$output = shift;
diff --git a/crypto/sha/asm/sha1-x86_64.pl b/crypto/sha/asm/sha1-x86_64.pl
index 93a4f01796..f7ed67a726 100755
--- a/crypto/sha/asm/sha1-x86_64.pl
+++ b/crypto/sha/asm/sha1-x86_64.pl
@@ -27,7 +27,7 @@
# gcc 3.4 32-bit asm cycles/byte
# Opteron +45% +20% 6.8
# Xeon P4 +65% +0% 9.9
-# Core2 +60% +10% 8.8
+# Core2 +60% +10% 7.0
$output=shift;
diff --git a/crypto/sha/asm/sha256-armv4.pl b/crypto/sha/asm/sha256-armv4.pl
index d2465e3aa8..4dd09619a6 100644
--- a/crypto/sha/asm/sha256-armv4.pl
+++ b/crypto/sha/asm/sha256-armv4.pl
@@ -7,9 +7,11 @@
# details see http://www.openssl.org/~appro/cryptogams/.
# ====================================================================
-# SHA256 block procedure for ARMv4.
+# SHA256 block procedure for ARMv4. May 2007.
-# Performance is ~2x better than gcc 3.4 generated code.
+# Performance is ~2x better than gcc 3.4 generated code and in "abso-
+# lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
+# byte.
$ctx="r0"; $t0="r0";
$inp="r1";
@@ -165,7 +167,7 @@ $code.=<<___;
tst lr,#1
moveq pc,lr @ be binary compatible with V4, yet
bx lr @ interoperable with Thumb ISA:-)
-.size sha256_block_data_order,.-sha1_block_data_order
+.size sha256_block_data_order,.-sha256_block_data_order
.asciz "SHA256 block transform for ARMv4, CRYPTOGAMS by <appro\@openssl.org>"
___
diff --git a/crypto/sha/asm/sha512-ppc.pl b/crypto/sha/asm/sha512-ppc.pl
index 087faab866..0ec4b0bcc3 100755
--- a/crypto/sha/asm/sha512-ppc.pl
+++ b/crypto/sha/asm/sha512-ppc.pl
@@ -16,6 +16,7 @@
# -m64 -m32 | -m64 -m32
# --------------------------------------+-----------------------
# PPC970,gcc-4.0.0 +50% +38% | +40% +410%(*)
+# Power6,xlc-7 +150% +90% | +100% +430%(*)
#
# (*) 64-bit code in 32-bit application context, which actually is
# on TODO list. It should be noted that for safe deployment in
diff --git a/crypto/sha/asm/sha512-s390x.pl b/crypto/sha/asm/sha512-s390x.pl
index 5dd17473fa..d2aceec68c 100644
--- a/crypto/sha/asm/sha512-s390x.pl
+++ b/crypto/sha/asm/sha512-s390x.pl
@@ -12,7 +12,7 @@
# April 2007.
#
# sha256_block_data_order is reportedly >3 times faster than gcc 3.3
-# generated code (must to be a bug in compiler, as improvement is
+# generated code (must be a bug in compiler, as improvement is
# "pathologically" high, in particular in comparison to other SHA
# modules). But the real twist is that it detects if hardware support
# for SHA256 is available and in such case utilizes it. Then the