diff options
| author | Andy Polyakov <appro@openssl.org> | 2016-06-30 15:57:57 +0200 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2016-07-01 14:25:08 +0200 |
| commit | f198cc43a0eca4bf1a8e7f60c51af560f4346dc8 (patch) | |
| tree | 358cd4d520381d787c70c7db7ac0858d6c473be5 /crypto/modes | |
| parent | 0685b15a68db1cd24678432f38b88f217495cbb9 (diff) | |
SPARC assembly pack: enforce V8+ ABI constraints.
Even though it's hard to imagine, it turned out that upper half of
arguments passed to V8+ subroutine can be non-zero.
["n" pseudo-instructions, such as srln being srl in 32-bit case and
srlx in 64-bit one, were implemented in binutils 2.10. It's assumed
that Solaris assembler implemented it around same time, i.e. 2000.]
Reviewed-by: Richard Levitte <levitte@openssl.org>
Diffstat (limited to 'crypto/modes')
| -rw-r--r-- | crypto/modes/asm/ghash-sparcv9.pl | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/crypto/modes/asm/ghash-sparcv9.pl b/crypto/modes/asm/ghash-sparcv9.pl index 6ca3a9bdf0..c4eb3b1f02 100644 --- a/crypto/modes/asm/ghash-sparcv9.pl +++ b/crypto/modes/asm/ghash-sparcv9.pl @@ -453,6 +453,8 @@ gcm_gmult_vis3: .align 32 gcm_ghash_vis3: save %sp,-$frame,%sp + nop + srln $len,0,$len ! needed on v8+, "nop" on v9 ldx [$Xip+8],$C2 ! load Xi ldx [$Xip+0],$C3 |