diff options
| author | Andy Polyakov <appro@openssl.org> | 2017-08-31 01:09:48 +0200 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2017-09-01 08:48:32 +0200 |
| commit | 6e5a853bda24e8aece325ecf5aa68b8ea832e414 (patch) | |
| tree | 270c82691b064492838700aff24933c2c44f7aed /crypto/modes | |
| parent | 89bc9cf682e833d44fe135c901fe75f600d871ef (diff) | |
crypto/cryptlib.c: mask more capability bits upon FXSR bit flip.
OPENSSL_ia32cap.pod discusses possibility to disable operations on
XMM register bank. This formally means that this flag has to be checked
in combination with other flags. But it customarily isn't. But instead
of chasing all the cases we can flip more bits together with FXSR one.
Reviewed-by: Richard Levitte <levitte@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/4303)
Diffstat (limited to 'crypto/modes')
| -rw-r--r-- | crypto/modes/gcm128.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/crypto/modes/gcm128.c b/crypto/modes/gcm128.c index 7dead2806d..c3a9259451 100644 --- a/crypto/modes/gcm128.c +++ b/crypto/modes/gcm128.c @@ -747,8 +747,7 @@ void CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block) # endif # if defined(GHASH_ASM_X86_OR_64) # if !defined(GHASH_ASM_X86) || defined(OPENSSL_IA32_SSE2) - if (OPENSSL_ia32cap_P[0] & (1 << 24) && /* check FXSR bit */ - OPENSSL_ia32cap_P[1] & (1 << 1)) { /* check PCLMULQDQ bit */ + if (OPENSSL_ia32cap_P[1] & (1 << 1)) { /* check PCLMULQDQ bit */ if (((OPENSSL_ia32cap_P[1] >> 22) & 0x41) == 0x41) { /* AVX+MOVBE */ gcm_init_avx(ctx->Htable, ctx->H.u); ctx->gmult = gcm_gmult_avx; |