diff options
| author | Andy Polyakov <appro@openssl.org> | 2017-07-10 15:19:45 +0200 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2017-07-24 23:30:47 +0200 |
| commit | 5c6317e86d5f44291bb2b028607b8bad858b4f74 (patch) | |
| tree | 05a79fd2c863866d77686be77ba92efad3d7fd73 /crypto/evp | |
| parent | a701db76e27ffce4c88c2f621269ca5589c984ea (diff) | |
evp/e_aes_cbc_hmac_sha256.c: give SHAEXT right priority.
Reviewed-by: Kurt Roeckx <kurt@roeckx.be>
(Merged from https://github.com/openssl/openssl/pull/3898)
(cherry picked from commit d0f6eb1d8c84165c383a677266cfae9c0b162781)
Diffstat (limited to 'crypto/evp')
| -rw-r--r-- | crypto/evp/e_aes_cbc_hmac_sha256.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/crypto/evp/e_aes_cbc_hmac_sha256.c b/crypto/evp/e_aes_cbc_hmac_sha256.c index 652ace4a4f..13973f110d 100644 --- a/crypto/evp/e_aes_cbc_hmac_sha256.c +++ b/crypto/evp/e_aes_cbc_hmac_sha256.c @@ -453,10 +453,12 @@ static int aesni_cbc_hmac_sha256_cipher(EVP_CIPHER_CTX *ctx, * to identify it and avoid stitch invocation. So that after we * establish that current CPU supports AVX, we even see if it's * either even XOP-capable Bulldozer-based or GenuineIntel one. + * But SHAEXT-capable go ahead... */ - if (OPENSSL_ia32cap_P[1] & (1 << (60 - 32)) && /* AVX? */ - ((OPENSSL_ia32cap_P[1] & (1 << (43 - 32))) /* XOP? */ - | (OPENSSL_ia32cap_P[0] & (1<<30))) && /* "Intel CPU"? */ + if (((OPENSSL_ia32cap_P[2] & (1 << 29)) || /* SHAEXT? */ + ((OPENSSL_ia32cap_P[1] & (1 << (60 - 32))) && /* AVX? */ + ((OPENSSL_ia32cap_P[1] & (1 << (43 - 32))) /* XOP? */ + | (OPENSSL_ia32cap_P[0] & (1 << 30))))) && /* "Intel CPU"? */ plen > (sha_off + iv) && (blocks = (plen - (sha_off + iv)) / SHA256_CBLOCK)) { SHA256_Update(&key->md, in + iv, sha_off); |