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authorAndy Polyakov <appro@openssl.org>2014-05-04 10:55:49 +0200
committerAndy Polyakov <appro@openssl.org>2014-05-04 10:55:49 +0200
commit4afa9f033dd58465b4c2d119a9d8cd737edeba26 (patch)
tree322c3cd2d3665909990b7e747108232770920091 /crypto/armcap.c
parent16ba70746b3bd9d1bd17cf7135c00ff1e47dfcfe (diff)
crypto/armcap.c: detect ARMv8 capabilities [in 32-bit build].
Diffstat (limited to 'crypto/armcap.c')
-rw-r--r--crypto/armcap.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/crypto/armcap.c b/crypto/armcap.c
index 9abaf396e5..550414425d 100644
--- a/crypto/armcap.c
+++ b/crypto/armcap.c
@@ -19,6 +19,10 @@ static void ill_handler (int sig) { siglongjmp(ill_jmp,sig); }
* ARM compilers support inline assembler...
*/
void _armv7_neon_probe(void);
+void _armv8_aes_probe(void);
+void _armv8_sha1_probe(void);
+void _armv8_sha256_probe(void);
+void _armv8_pmull_probe(void);
unsigned int _armv7_tick(void);
unsigned int OPENSSL_rdtsc(void)
@@ -68,6 +72,26 @@ void OPENSSL_cpuid_setup(void)
{
_armv7_neon_probe();
OPENSSL_armcap_P |= ARMV7_NEON;
+ if (sigsetjmp(ill_jmp,1) == 0)
+ {
+ _armv8_aes_probe();
+ OPENSSL_armcap_P |= ARMV8_AES;
+ }
+ if (sigsetjmp(ill_jmp,1) == 0)
+ {
+ _armv8_sha1_probe();
+ OPENSSL_armcap_P |= ARMV8_SHA1;
+ }
+ if (sigsetjmp(ill_jmp,1) == 0)
+ {
+ _armv8_sha256_probe();
+ OPENSSL_armcap_P |= ARMV8_SHA256;
+ }
+ if (sigsetjmp(ill_jmp,1) == 0)
+ {
+ _armv8_pmull_probe();
+ OPENSSL_armcap_P |= ARMV8_PMULL;
+ }
}
if (sigsetjmp(ill_jmp,1) == 0)
{