diff options
| author | XiaokangQian <xiaokang.qian@arm.com> | 2022-05-18 02:27:55 +0000 |
|---|---|---|
| committer | Pauli <pauli@openssl.org> | 2022-05-23 11:05:51 +1000 |
| commit | 9224a407f9bb4c2af087ecf6e691c9027b594ec0 (patch) | |
| tree | f82608d1121600b4d0c5399a86892a08e1e0226f /crypto/arm_arch.h | |
| parent | be4b2ed2fbae0efe8d4984d1bfefe5a8e3a45d02 (diff) | |
Apply the AES-GCM unroll8 optimization patch to Neoverse N2
The loop unrolling and use of EOR3 can improve N2 performance
by up to 32%
Signed-off-by: XiaokangQian <xiaokang.qian@arm.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/18350)
Diffstat (limited to 'crypto/arm_arch.h')
| -rw-r--r-- | crypto/arm_arch.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/crypto/arm_arch.h b/crypto/arm_arch.h index 0f23e8dc49..5d8788877f 100644 --- a/crypto/arm_arch.h +++ b/crypto/arm_arch.h @@ -101,6 +101,7 @@ extern unsigned int OPENSSL_armv8_rsa_neonized; # define ARM_CPU_PART_CORTEX_A72 0xD08 # define ARM_CPU_PART_N1 0xD0C # define ARM_CPU_PART_V1 0xD40 +# define ARM_CPU_PART_N2 0xD49 # define MIDR_PARTNUM_SHIFT 4 # define MIDR_PARTNUM_MASK (0xfff << MIDR_PARTNUM_SHIFT) |