diff options
| author | Fangming.Fang <fangming.fang@arm.com> | 2020-04-28 02:33:50 +0000 |
|---|---|---|
| committer | Tomas Mraz <tmraz@fedoraproject.org> | 2020-12-09 16:17:17 +0100 |
| commit | 5ea64b456b1a27ae046f23d632a968a7583bb9eb (patch) | |
| tree | 3c9bfe67790eef189c3189c6964d2817a42d0052 /crypto/arm64cpuid.pl | |
| parent | 6582661f7b369c3ce7edab5fea2529de5f2fb408 (diff) | |
Read MIDR_EL1 system register on aarch64
MIDR_EL1 system register exposes microarchitecture information so that
people can make micro-arch related optimization such as exposing as
much instruction level parallelism as possible.
MIDR_EL1 register can be read only if HWCAP_CPUID feature is supported.
Change-Id: Iabb8a36c5d31b184dba6399f378598058d394d4e
Reviewed-by: Paul Dale <paul.dale@oracle.com>
Reviewed-by: Tomas Mraz <tmraz@fedoraproject.org>
(Merged from https://github.com/openssl/openssl/pull/11744)
Diffstat (limited to 'crypto/arm64cpuid.pl')
| -rwxr-xr-x | crypto/arm64cpuid.pl | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/crypto/arm64cpuid.pl b/crypto/arm64cpuid.pl index 0eadcc43f2..ac76dd449f 100755 --- a/crypto/arm64cpuid.pl +++ b/crypto/arm64cpuid.pl @@ -81,6 +81,13 @@ _armv8_sha512_probe: ret .size _armv8_sha512_probe,.-_armv8_sha512_probe +.globl _armv8_cpuid_probe +.type _armv8_cpuid_probe,%function +_armv8_cpuid_probe: + mrs x0, midr_el1 + ret +.size _armv8_cpuid_probe,.-_armv8_cpuid_probe + .globl OPENSSL_cleanse .type OPENSSL_cleanse,%function .align 5 |