diff options
author | Andy Polyakov <appro@openssl.org> | 2015-11-04 23:57:06 +0100 |
---|---|---|
committer | Andy Polyakov <appro@openssl.org> | 2015-11-16 13:06:10 +0100 |
commit | a5fd24d19bbb586b1c6d235c2021e9bead22c9f5 (patch) | |
tree | c0075407f89726a669a66748a2550982f01f6d88 /crypto/aes | |
parent | 39e46af6bb3f1ad7f5c0dee8e3d13e2daf9a0160 (diff) |
aesni-sha256-x86_64.pl: fix crash on AMD Jaguar.
It was also found that stich performs suboptimally on AMD Jaguar, hence
execution is limited to XOP-capable and Intel processors.
Reviewed-by: Kurt Roeckx <kurt@openssl.org>
Diffstat (limited to 'crypto/aes')
-rw-r--r-- | crypto/aes/asm/aesni-sha256-x86_64.pl | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/crypto/aes/asm/aesni-sha256-x86_64.pl b/crypto/aes/asm/aesni-sha256-x86_64.pl index 74dad44408..8a8199445b 100644 --- a/crypto/aes/asm/aesni-sha256-x86_64.pl +++ b/crypto/aes/asm/aesni-sha256-x86_64.pl @@ -140,11 +140,8 @@ $code.=<<___ if ($avx>1); je ${func}_avx2 ___ $code.=<<___; - and \$`1<<30`,%eax # mask "Intel CPU" bit - and \$`1<<28|1<<9`,%r10d # mask AVX+SSSE3 bits - or %eax,%r10d - cmp \$`1<<28|1<<9|1<<30`,%r10d - je ${func}_avx + and \$`1<<28`,%r10d # check for AVX + jnz ${func}_avx ud2 ___ } |